14 Publications

Mark all

[14]
2020 | Conference Paper | IST-REx-ID: 7348 | OA
Ferrere T, Henzinger TA, Kragl B. Monitoring event frequencies. In: 28th EACSL Annual Conference on Computer Science Logic. Vol 152. Schloss Dagstuhl - Leibniz-Zentrum für Informatik; 2020. doi:10.4230/LIPIcs.CSL.2020.20
View | Files available | DOI | arXiv
 
[13]
2019 | Conference Paper | IST-REx-ID: 6428
Ferrere T, Nickovic D, Donzé A, Ito H, Kapinski J. Interface-aware signal temporal logic. In: Proceedings of the 2019 22nd ACM International Conference on Hybrid Systems: Computation and Control. ACM; 2019:57-66. doi:10.1145/3302504.3311800
View | DOI
 
[12]
2019 | Journal Article | IST-REx-ID: 7109
Ferrere T, Maler O, Ničković D, Pnueli A. From real-time logic to timed automata. Journal of the ACM. 2019;66(3). doi:10.1145/3286976
View | DOI
 
[11]
2019 | Conference Paper | IST-REx-ID: 7159
Ničković D, Qin X, Ferrere T, Mateis C, Deshmukh J. Shape expressions for specifying and extracting signal features. In: 19th International Conference on Runtime Verification. Vol 11757. Springer Nature; 2019:292-309. doi:10.1007/978-3-030-32079-9_17
View | DOI
 
[10]
2019 | Conference Paper | IST-REx-ID: 7232
Ferrere T, Maler O, Nickovic D. Mixed-time signal temporal logic. In: Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Vol 11750. Springer Nature; 2019:59-75. doi:10.1007/978-3-030-29662-9_4
View | DOI
 
[9]
2018 | Conference Paper | IST-REx-ID: 182 | OA
Bakhirkin A, Ferrere T, Maler O. Efficient parametric identification for STL. In: Proceedings of the 21st International Conference on Hybrid Systems. ACM; 2018:177-186. doi:10.1145/3178126.3178132
View | Files available | DOI
 
[8]
2018 | Conference Paper | IST-REx-ID: 183
Bartocci E, Ferrere T, Manjunath N, Nickovic D. Localizing faults in simulink/stateflow models with STL. In: Association for Computing Machinery, Inc; 2018:197-206. doi:10.1145/3178126.3178131
View | DOI
 
[7]
2018 | Conference Paper | IST-REx-ID: 5959 | OA
Bakhirkin A, Ferrere T, Henzinger TA, Nickovicl D. Keynote: The first-order logic of signals. In: 2018 International Conference on Embedded Software. IEEE; 2018:1-10. doi:10.1109/emsoft.2018.8537203
View | Files available | DOI
 
[6]
2018 | Conference Paper | IST-REx-ID: 299 | OA
Nickovic D, Lebeltel O, Maler O, Ferrere T, Ulus D. AMT 2.0: Qualitative and quantitative trace analysis with extended signal temporal logic. In: Beyer D, Huisman M, eds. Vol 10806. Springer; 2018:303-319. doi:10.1007/978-3-319-89963-3_18
View | Files available | DOI
 
[5]
2018 | Conference Paper | IST-REx-ID: 78 | OA
Bakhirkin A, Ferrere T, Nickovic D, Maler O, Asarin E. Online timed pattern matching using automata. In: Vol 11022. Springer; 2018:215-232. doi:10.1007/978-3-030-00151-3_13
View | Files available | DOI
 
[4]
2018 | Conference Paper | IST-REx-ID: 81
Elgyütt A, Ferrere T, Henzinger TA. Monitoring temporal logic with clock variables. In: Vol 11022. Springer; 2018:53-70. doi:10.1007/978-3-030-00151-3_4
View | DOI
 
[3]
2018 | Conference Paper | IST-REx-ID: 144
Ferrere T, Henzinger TA, Saraç E. A theory of register monitors. In: Vol Part F138033. IEEE; 2018:394-403. doi:10.1145/3209108.3209194
View | DOI
 
[2]
2018 | Conference Paper | IST-REx-ID: 156
Ferrere T. The compound interest in relaxing punctuality. In: Vol 10951. Springer; 2018:147-164. doi:10.1007/978-3-319-95582-7_9
View | DOI
 
[1]
2017 | Conference Paper | IST-REx-ID: 636 | OA
Bakhirkin A, Ferrere T, Maler O, Ulus D. On the quantitative semantics of regular expressions over real-valued signals. In: Abate A, Geeraerts G, eds. Vol 10419. Springer; 2017:189-206. doi:10.1007/978-3-319-65765-3_11
View | DOI | Download Submitted Version (ext.)
 

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14 Publications

Mark all

[14]
2020 | Conference Paper | IST-REx-ID: 7348 | OA
Ferrere T, Henzinger TA, Kragl B. Monitoring event frequencies. In: 28th EACSL Annual Conference on Computer Science Logic. Vol 152. Schloss Dagstuhl - Leibniz-Zentrum für Informatik; 2020. doi:10.4230/LIPIcs.CSL.2020.20
View | Files available | DOI | arXiv
 
[13]
2019 | Conference Paper | IST-REx-ID: 6428
Ferrere T, Nickovic D, Donzé A, Ito H, Kapinski J. Interface-aware signal temporal logic. In: Proceedings of the 2019 22nd ACM International Conference on Hybrid Systems: Computation and Control. ACM; 2019:57-66. doi:10.1145/3302504.3311800
View | DOI
 
[12]
2019 | Journal Article | IST-REx-ID: 7109
Ferrere T, Maler O, Ničković D, Pnueli A. From real-time logic to timed automata. Journal of the ACM. 2019;66(3). doi:10.1145/3286976
View | DOI
 
[11]
2019 | Conference Paper | IST-REx-ID: 7159
Ničković D, Qin X, Ferrere T, Mateis C, Deshmukh J. Shape expressions for specifying and extracting signal features. In: 19th International Conference on Runtime Verification. Vol 11757. Springer Nature; 2019:292-309. doi:10.1007/978-3-030-32079-9_17
View | DOI
 
[10]
2019 | Conference Paper | IST-REx-ID: 7232
Ferrere T, Maler O, Nickovic D. Mixed-time signal temporal logic. In: Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Vol 11750. Springer Nature; 2019:59-75. doi:10.1007/978-3-030-29662-9_4
View | DOI
 
[9]
2018 | Conference Paper | IST-REx-ID: 182 | OA
Bakhirkin A, Ferrere T, Maler O. Efficient parametric identification for STL. In: Proceedings of the 21st International Conference on Hybrid Systems. ACM; 2018:177-186. doi:10.1145/3178126.3178132
View | Files available | DOI
 
[8]
2018 | Conference Paper | IST-REx-ID: 183
Bartocci E, Ferrere T, Manjunath N, Nickovic D. Localizing faults in simulink/stateflow models with STL. In: Association for Computing Machinery, Inc; 2018:197-206. doi:10.1145/3178126.3178131
View | DOI
 
[7]
2018 | Conference Paper | IST-REx-ID: 5959 | OA
Bakhirkin A, Ferrere T, Henzinger TA, Nickovicl D. Keynote: The first-order logic of signals. In: 2018 International Conference on Embedded Software. IEEE; 2018:1-10. doi:10.1109/emsoft.2018.8537203
View | Files available | DOI
 
[6]
2018 | Conference Paper | IST-REx-ID: 299 | OA
Nickovic D, Lebeltel O, Maler O, Ferrere T, Ulus D. AMT 2.0: Qualitative and quantitative trace analysis with extended signal temporal logic. In: Beyer D, Huisman M, eds. Vol 10806. Springer; 2018:303-319. doi:10.1007/978-3-319-89963-3_18
View | Files available | DOI
 
[5]
2018 | Conference Paper | IST-REx-ID: 78 | OA
Bakhirkin A, Ferrere T, Nickovic D, Maler O, Asarin E. Online timed pattern matching using automata. In: Vol 11022. Springer; 2018:215-232. doi:10.1007/978-3-030-00151-3_13
View | Files available | DOI
 
[4]
2018 | Conference Paper | IST-REx-ID: 81
Elgyütt A, Ferrere T, Henzinger TA. Monitoring temporal logic with clock variables. In: Vol 11022. Springer; 2018:53-70. doi:10.1007/978-3-030-00151-3_4
View | DOI
 
[3]
2018 | Conference Paper | IST-REx-ID: 144
Ferrere T, Henzinger TA, Saraç E. A theory of register monitors. In: Vol Part F138033. IEEE; 2018:394-403. doi:10.1145/3209108.3209194
View | DOI
 
[2]
2018 | Conference Paper | IST-REx-ID: 156
Ferrere T. The compound interest in relaxing punctuality. In: Vol 10951. Springer; 2018:147-164. doi:10.1007/978-3-319-95582-7_9
View | DOI
 
[1]
2017 | Conference Paper | IST-REx-ID: 636 | OA
Bakhirkin A, Ferrere T, Maler O, Ulus D. On the quantitative semantics of regular expressions over real-valued signals. In: Abate A, Geeraerts G, eds. Vol 10419. Springer; 2017:189-206. doi:10.1007/978-3-319-65765-3_11
View | DOI | Download Submitted Version (ext.)
 

Search

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