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386 Publications
2017 | Journal Article | IST-REx-ID: 1338 | 
Cerny, Pavol, et al. “From Non-Preemptive to Preemptive Scheduling Using Synchronization Synthesis.” Formal Methods in System Design, vol. 50, no. 2–3, Springer, 2017, pp. 97–139, doi:10.1007/s10703-016-0256-5.
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2017 | Journal Article | IST-REx-ID: 1351 |
Giacobbe, Mirco, et al. “Model Checking the Evolution of Gene Regulatory Networks.” Acta Informatica, vol. 54, no. 8, Springer, 2017, pp. 765–87, doi:10.1007/s00236-016-0278-x.
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2017 | Journal Article | IST-REx-ID: 1196
Henzinger, Thomas A., and Jan Otop. “Model Measuring for Discrete and Hybrid Systems.” Nonlinear Analysis: Hybrid Systems, vol. 23, Elsevier, 2017, pp. 166–90, doi:10.1016/j.nahs.2016.09.001.
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2017 | Conference Paper | IST-REx-ID: 1116 |
Avni, Guy, et al. Computing Scores of Forwarding Schemes in Switched Networks with Probabilistic Faults. Vol. 10206, Springer, 2017, pp. 169–87, doi:10.1007/978-3-662-54580-5_10.
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2017 | Journal Article | IST-REx-ID: 1066
Chatterjee, Krishnendu, et al. “Quantitative Fair Simulation Games.” Information and Computation, vol. 254, no. 2, Elsevier, 2017, pp. 143–66, doi:10.1016/j.ic.2016.10.006.
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2017 | Conference Paper | IST-REx-ID: 1011 |
Chatterjee, Krishnendu, et al. Faster Algorithms for Weighted Recursive State Machines. Edited by Hongseok Yang, vol. 10201, Springer, 2017, pp. 287–313, doi:10.1007/978-3-662-54434-1_11.
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2017 | Conference Paper | IST-REx-ID: 1003 |
Avni, Guy, et al. An Abstraction-Refinement Methodology for Reasoning about Network Games. AAAI Press, 2017, pp. 70–76, doi:10.24963/ijcai.2017/11.
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2017 | Conference Paper | IST-REx-ID: 962
Trinh, Minh, et al. Model Counting for Recursively-Defined Strings. Edited by Rupak Majumdar and Viktor Kunčak, vol. 10427, Springer, 2017, pp. 399–418, doi:10.1007/978-3-319-63390-9_21.
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2017 | Conference Paper | IST-REx-ID: 942
Le, Xuan, et al. S3: Syntax- and Semantic-Guided Repair Synthesis via Programming by Examples. Vol. F130154, ACM, 2017, pp. 593–604, doi:10.1145/3106237.3106309.
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2017 | Journal Article | IST-REx-ID: 743
Gottlob, Georg, et al. “Preface of the Special Issue in Memoriam Helmut Veith.” Formal Methods in System Design, vol. 51, no. 2, Springer, 2017, pp. 267–69, doi:10.1007/s10703-017-0307-6.
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2017 | Conference Paper | IST-REx-ID: 549 |
Finkbeiner, Bernd, and Andrey Kupriyanov. “Causality-Based Model Checking.” Electronic Proceedings in Theoretical Computer Science, vol. 259, Open Publishing Association, 2017, pp. 31–38, doi:10.4204/EPTCS.259.3.
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2016 | Conference Paper | IST-REx-ID: 1090 |
Chatterjee, Krishnendu, et al. Nested Weighted Limit-Average Automata of Bounded Width. Vol. 58, 24, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 2016, doi:10.4230/LIPIcs.MFCS.2016.24.
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2016 | Conference Paper | IST-REx-ID: 1095 |
Haas, Andreas, et al. “Local Linearizability for Concurrent Container-Type Data Structures.” Leibniz International Proceedings in Informatics, vol. 59, 6, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 2016, doi:10.4230/LIPIcs.CONCUR.2016.6.
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2016 | Conference Paper | IST-REx-ID: 1103 |
Gurung, Amit, et al. Parallel Reachability Analysis for Hybrid Systems. 7797741, IEEE, 2016, doi:10.1109/MEMCOD.2016.7797741.
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2016 | Conference Paper | IST-REx-ID: 1135 |
Avni, Guy, et al. “Synthesizing Time Triggered Schedules for Switched Networks with Faulty Links.” Proceedings of the 13th International Conference on Embedded Software , 26, ACM, 2016, doi:10.1145/2968478.2968499.
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2016 | Conference Paper | IST-REx-ID: 1134
Duggirala, Parasara, et al. “Tutorial: Software Tools for Hybrid Systems Verification Transformation and Synthesis C2E2 HyST and TuLiP.” 2016 IEEE Conference on Control Applications, 7587948, IEEE, 2016, doi:10.1109/CCA.2016.7587948.
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2016 | Conference Paper | IST-REx-ID: 1138 |
Chatterjee, Krishnendu, et al. “Quantitative Automata under Probabilistic Semantics.” Proceedings of the 31st Annual ACM/IEEE Symposium, IEEE, 2016, pp. 76–85, doi:10.1145/2933575.2933588.
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| arXiv
2016 | Conference Paper | IST-REx-ID: 1227 |
Kong, Hui, et al. Discrete Abstraction of Multiaffine Systems. Vol. 9957, Springer, 2016, pp. 128–44, doi:10.1007/978-3-319-47151-8_9.
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2016 | Conference Paper | IST-REx-ID: 1256 |
Jiang, Yu, et al. From Stateflow Simulation to Verified Implementation: A Verification Approach and a Real-Time Train Controller Design. 7461337, IEEE, 2016, doi:10.1109/RTAS.2016.7461337.
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2016 | Conference Paper | IST-REx-ID: 1335 |
Chatterjee, Krishnendu, et al. Quantitative Monitor Automata. Vol. 9837, Springer, 2016, pp. 23–38, doi:10.1007/978-3-662-53413-7_2.
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