Please note that LibreCat no longer supports Internet Explorer versions 8 or 9 (or earlier).
We recommend upgrading to the latest Internet Explorer, Google Chrome, or Firefox.
386 Publications
2018 | Book Chapter | IST-REx-ID: 86 | 
Chatterjee, K., Henzinger, T. A., & Otop, J. (2018). Computing average response time. In M. Lohstroh, P. Derler, & M. Sirjani (Eds.), Principles of Modeling (Vol. 10760, pp. 143–161). Springer. https://doi.org/10.1007/978-3-319-95246-8_9
[Submitted Version]
View
| Files available
| DOI
2018 | Conference Paper | IST-REx-ID: 6005 |
Avni, G., Guha, S., & Kupferman, O. (2018). Timed network games with clocks (Vol. 117). Presented at the MFCS: Mathematical Foundations of Computer Science, Liverpool, United Kingdom: Schloss Dagstuhl - Leibniz-Zentrum für Informatik. https://doi.org/10.4230/LIPICS.MFCS.2018.23
[Published Version]
View
| Files available
| DOI
2018 | Conference Paper | IST-REx-ID: 133 |
Kragl, B., Qadeer, S., & Henzinger, T. A. (2018). Synchronizing the asynchronous (Vol. 118). Presented at the CONCUR: International Conference on Concurrency Theory, Beijing, China: Schloss Dagstuhl - Leibniz-Zentrum für Informatik. https://doi.org/10.4230/LIPIcs.CONCUR.2018.21
[Published Version]
View
| Files available
| DOI
2018 | Conference Paper | IST-REx-ID: 299 |
Nickovic, D., Lebeltel, O., Maler, O., Ferrere, T., & Ulus, D. (2018). AMT 2.0: Qualitative and quantitative trace analysis with extended signal temporal logic. In D. Beyer & M. Huisman (Eds.) (Vol. 10806, pp. 303–319). Presented at the TACAS: Tools and Algorithms for the Construction and Analysis of Systems, Thessaloniki, Greece: Springer. https://doi.org/10.1007/978-3-319-89963-3_18
[Published Version]
View
| Files available
| DOI
| WoS
2018 | Conference Paper | IST-REx-ID: 144
Ferrere, T., Henzinger, T. A., & Saraç, E. (2018). A theory of register monitors (Vol. Part F138033, pp. 394–403). Presented at the LICS: Logic in Computer Science, Oxford, UK: IEEE. https://doi.org/10.1145/3209108.3209194
View
| DOI
| WoS
2018 | Conference Paper | IST-REx-ID: 182 |
Bakhirkin, A., Ferrere, T., & Maler, O. (2018). Efficient parametric identification for STL. In Proceedings of the 21st International Conference on Hybrid Systems (pp. 177–186). Porto, Portugal: ACM. https://doi.org/10.1145/3178126.3178132
[Submitted Version]
View
| Files available
| DOI
| WoS
2018 | Conference Paper | IST-REx-ID: 5788 |
Avni, G., Henzinger, T. A., & Ibsen-Jensen, R. (2018). Infinite-duration poorman-bidding games (Vol. 11316, pp. 21–36). Presented at the 14th International Conference on Web and Internet Economics, WINE, Oxford, UK: Springer. https://doi.org/10.1007/978-3-030-04612-5_2
[Preprint]
View
| DOI
| Download Preprint (ext.)
| WoS
| arXiv
2018 | Conference Paper | IST-REx-ID: 160 |
Kragl, B., & Qadeer, S. (2018). Layered Concurrent Programs (Vol. 10981, pp. 79–102). Presented at the CAV: Computer Aided Verification, Oxford, UK: Springer. https://doi.org/10.1007/978-3-319-96145-3_5
[Published Version]
View
| Files available
| DOI
| WoS
2018 | Conference Paper | IST-REx-ID: 183
Bartocci, E., Ferrere, T., Manjunath, N., & Nickovic, D. (2018). Localizing faults in simulink/stateflow models with STL (pp. 197–206). Presented at the HSCC: Hybrid Systems: Computation and Control, Porto, Portugal: Association for Computing Machinery, Inc. https://doi.org/10.1145/3178126.3178131
View
| DOI
| WoS
2018 | Conference Paper | IST-REx-ID: 81 |
Elgyütt, A., Ferrere, T., & Henzinger, T. A. (2018). Monitoring temporal logic with clock variables (Vol. 11022, pp. 53–70). Presented at the FORMATS: Formal Modeling and Analysis of Timed Systems, Beijing, China: Springer. https://doi.org/10.1007/978-3-030-00151-3_4
[Submitted Version]
View
| Files available
| DOI
| WoS