---
_id: '6005'
abstract:
- lang: eng
text: Network games are widely used as a model for selfish resource-allocation problems.
In the classicalmodel, each player selects a path connecting her source and target
vertices. The cost of traversingan edge depends on theload; namely, number of
players that traverse it. Thus, it abstracts the factthat different users may
use a resource at different times and for different durations, which playsan important
role in determining the costs of the users in reality. For example, when transmittingpackets
in a communication network, routing traffic in a road network, or processing a
task in aproduction system, actual sharing and congestion of resources crucially
depends on time.In [13], we introducedtimed network games, which add a time component
to network games.Each vertexvin the network is associated with a cost function,
mapping the load onvto theprice that a player pays for staying invfor one time
unit with this load. Each edge in thenetwork is guarded by the time intervals
in which it can be traversed, which forces the players tospend time in the vertices.
In this work we significantly extend the way time can be referred toin timed network
games. In the model we study, the network is equipped withclocks, and, as intimed
automata, edges are guarded by constraints on the values of the clocks, and their
traversalmay involve a reset of some clocks. We argue that the stronger model
captures many realisticnetworks. The addition of clocks breaks the techniques
we developed in [13] and we developnew techniques in order to show that positive
results on classic network games carry over to thestronger timed setting.
alternative_title:
- LIPIcs
article_number: '23'
article_processing_charge: No
author:
- first_name: Guy
full_name: Avni, Guy
id: 463C8BC2-F248-11E8-B48F-1D18A9856A87
last_name: Avni
orcid: 0000-0001-5588-8287
- first_name: Shibashis
full_name: Guha, Shibashis
last_name: Guha
- first_name: Orna
full_name: Kupferman, Orna
last_name: Kupferman
citation:
ama: 'Avni G, Guha S, Kupferman O. Timed network games with clocks. In: Vol 117.
Schloss Dagstuhl - Leibniz-Zentrum für Informatik; 2018. doi:10.4230/LIPICS.MFCS.2018.23'
apa: 'Avni, G., Guha, S., & Kupferman, O. (2018). Timed network games with clocks
(Vol. 117). Presented at the MFCS: Mathematical Foundations of Computer Science,
Liverpool, United Kingdom: Schloss Dagstuhl - Leibniz-Zentrum für Informatik.
https://doi.org/10.4230/LIPICS.MFCS.2018.23'
chicago: Avni, Guy, Shibashis Guha, and Orna Kupferman. “Timed Network Games with
Clocks,” Vol. 117. Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 2018. https://doi.org/10.4230/LIPICS.MFCS.2018.23.
ieee: 'G. Avni, S. Guha, and O. Kupferman, “Timed network games with clocks,” presented
at the MFCS: Mathematical Foundations of Computer Science, Liverpool, United Kingdom,
2018, vol. 117.'
ista: 'Avni G, Guha S, Kupferman O. 2018. Timed network games with clocks. MFCS:
Mathematical Foundations of Computer Science, LIPIcs, vol. 117, 23.'
mla: Avni, Guy, et al. Timed Network Games with Clocks. Vol. 117, 23, Schloss
Dagstuhl - Leibniz-Zentrum für Informatik, 2018, doi:10.4230/LIPICS.MFCS.2018.23.
short: G. Avni, S. Guha, O. Kupferman, in:, Schloss Dagstuhl - Leibniz-Zentrum für
Informatik, 2018.
conference:
end_date: 2018-08-31
location: Liverpool, United Kingdom
name: 'MFCS: Mathematical Foundations of Computer Science'
start_date: 2018-08-27
date_created: 2019-02-14T14:12:09Z
date_published: 2018-08-01T00:00:00Z
date_updated: 2023-02-23T14:02:58Z
day: '01'
ddc:
- '000'
department:
- _id: ToHe
doi: 10.4230/LIPICS.MFCS.2018.23
file:
- access_level: open_access
checksum: 41ab2ae9b63f5eb49fa995250c0ba128
content_type: application/pdf
creator: dernst
date_created: 2019-02-14T14:22:04Z
date_updated: 2020-07-14T12:47:15Z
file_id: '6007'
file_name: 2018_LIPIcs_Avni.pdf
file_size: 542889
relation: main_file
file_date_updated: 2020-07-14T12:47:15Z
has_accepted_license: '1'
intvolume: ' 117'
language:
- iso: eng
month: '08'
oa: 1
oa_version: Published Version
project:
- _id: 25832EC2-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: S 11407_N23
name: Rigorous Systems Engineering
- _id: 25F42A32-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: Z211
name: The Wittgenstein Prize
- _id: 264B3912-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: M02369
name: Formal Methods meets Algorithmic Game Theory
publication_identifier:
issn:
- 1868-8969
publication_status: published
publisher: Schloss Dagstuhl - Leibniz-Zentrum für Informatik
quality_controlled: '1'
related_material:
record:
- id: '963'
relation: earlier_version
status: public
scopus_import: '1'
status: public
title: Timed network games with clocks
tmp:
image: /images/cc_by.png
legal_code_url: https://creativecommons.org/licenses/by/4.0/legalcode
name: Creative Commons Attribution 4.0 International Public License (CC-BY 4.0)
short: CC BY (4.0)
type: conference
user_id: 2DF688A6-F248-11E8-B48F-1D18A9856A87
volume: 117
year: '2018'
...
---
_id: '133'
abstract:
- lang: eng
text: Synchronous programs are easy to specify because the side effects of an operation
are finished by the time the invocation of the operation returns to the caller.
Asynchronous programs, on the other hand, are difficult to specify because there
are side effects due to pending computation scheduled as a result of the invocation
of an operation. They are also difficult to verify because of the large number
of possible interleavings of concurrent computation threads. We present synchronization,
a new proof rule that simplifies the verification of asynchronous programs by
introducing the fiction, for proof purposes, that asynchronous operations complete
synchronously. Synchronization summarizes an asynchronous computation as immediate
atomic effect. Modular verification is enabled via pending asynchronous calls
in atomic summaries, and a complementary proof rule that eliminates pending asynchronous
calls when components and their specifications are composed. We evaluate synchronization
in the context of a multi-layer refinement verification methodology on a collection
of benchmark programs.
alternative_title:
- LIPIcs
article_number: '21'
author:
- first_name: Bernhard
full_name: Kragl, Bernhard
id: 320FC952-F248-11E8-B48F-1D18A9856A87
last_name: Kragl
orcid: 0000-0001-7745-9117
- first_name: Shaz
full_name: Qadeer, Shaz
last_name: Qadeer
- first_name: Thomas A
full_name: Henzinger, Thomas A
id: 40876CD8-F248-11E8-B48F-1D18A9856A87
last_name: Henzinger
orcid: 0000−0002−2985−7724
citation:
ama: 'Kragl B, Qadeer S, Henzinger TA. Synchronizing the asynchronous. In: Vol 118.
Schloss Dagstuhl - Leibniz-Zentrum für Informatik; 2018. doi:10.4230/LIPIcs.CONCUR.2018.21'
apa: 'Kragl, B., Qadeer, S., & Henzinger, T. A. (2018). Synchronizing the asynchronous
(Vol. 118). Presented at the CONCUR: International Conference on Concurrency Theory,
Beijing, China: Schloss Dagstuhl - Leibniz-Zentrum für Informatik. https://doi.org/10.4230/LIPIcs.CONCUR.2018.21'
chicago: Kragl, Bernhard, Shaz Qadeer, and Thomas A Henzinger. “Synchronizing the
Asynchronous,” Vol. 118. Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 2018.
https://doi.org/10.4230/LIPIcs.CONCUR.2018.21.
ieee: 'B. Kragl, S. Qadeer, and T. A. Henzinger, “Synchronizing the asynchronous,”
presented at the CONCUR: International Conference on Concurrency Theory, Beijing,
China, 2018, vol. 118.'
ista: 'Kragl B, Qadeer S, Henzinger TA. 2018. Synchronizing the asynchronous. CONCUR:
International Conference on Concurrency Theory, LIPIcs, vol. 118, 21.'
mla: Kragl, Bernhard, et al. Synchronizing the Asynchronous. Vol. 118, 21,
Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 2018, doi:10.4230/LIPIcs.CONCUR.2018.21.
short: B. Kragl, S. Qadeer, T.A. Henzinger, in:, Schloss Dagstuhl - Leibniz-Zentrum
für Informatik, 2018.
conference:
end_date: 2018-09-07
location: Beijing, China
name: 'CONCUR: International Conference on Concurrency Theory'
start_date: 2018-09-04
date_created: 2018-12-11T11:44:48Z
date_published: 2018-08-13T00:00:00Z
date_updated: 2023-09-07T13:18:00Z
day: '13'
ddc:
- '000'
department:
- _id: ToHe
doi: 10.4230/LIPIcs.CONCUR.2018.21
file:
- access_level: open_access
checksum: c90895f4c5fafc18ddc54d1c8848077e
content_type: application/pdf
creator: system
date_created: 2018-12-12T10:18:46Z
date_updated: 2020-07-14T12:44:44Z
file_id: '5368'
file_name: IST-2018-853-v2+2_concur2018.pdf
file_size: 745438
relation: main_file
file_date_updated: 2020-07-14T12:44:44Z
has_accepted_license: '1'
intvolume: ' 118'
language:
- iso: eng
month: '08'
oa: 1
oa_version: Published Version
project:
- _id: 25F2ACDE-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: S11402-N23
name: Rigorous Systems Engineering
- _id: 25F5A88A-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: S11402-N23
name: Moderne Concurrency Paradigms
publication_identifier:
issn:
- '18688969'
publication_status: published
publisher: Schloss Dagstuhl - Leibniz-Zentrum für Informatik
publist_id: '7790'
pubrep_id: '1039'
quality_controlled: '1'
related_material:
record:
- id: '6426'
relation: earlier_version
status: public
- id: '8332'
relation: dissertation_contains
status: public
scopus_import: 1
status: public
title: Synchronizing the asynchronous
tmp:
image: /images/cc_by.png
legal_code_url: https://creativecommons.org/licenses/by/4.0/legalcode
name: Creative Commons Attribution 4.0 International Public License (CC-BY 4.0)
short: CC BY (4.0)
type: conference
user_id: 2DF688A6-F248-11E8-B48F-1D18A9856A87
volume: 118
year: '2018'
...
---
_id: '299'
abstract:
- lang: eng
text: We introduce in this paper AMT 2.0 , a tool for qualitative and quantitative
analysis of hybrid continuous and Boolean signals that combine numerical values
and discrete events. The evaluation of the signals is based on rich temporal specifications
expressed in extended Signal Temporal Logic (xSTL), which integrates Timed Regular
Expressions (TRE) within Signal Temporal Logic (STL). The tool features qualitative
monitoring (property satisfaction checking), trace diagnostics for explaining
and justifying property violations and specification-driven measurement of quantitative
features of the signal.
alternative_title:
- LNCS
article_processing_charge: No
author:
- first_name: Dejan
full_name: Nickovic, Dejan
id: 41BCEE5C-F248-11E8-B48F-1D18A9856A87
last_name: Nickovic
- first_name: Olivier
full_name: Lebeltel, Olivier
last_name: Lebeltel
- first_name: Oded
full_name: Maler, Oded
last_name: Maler
- first_name: Thomas
full_name: Ferrere, Thomas
id: 40960E6E-F248-11E8-B48F-1D18A9856A87
last_name: Ferrere
orcid: 0000-0001-5199-3143
- first_name: Dogan
full_name: Ulus, Dogan
last_name: Ulus
citation:
ama: 'Nickovic D, Lebeltel O, Maler O, Ferrere T, Ulus D. AMT 2.0: Qualitative and
quantitative trace analysis with extended signal temporal logic. In: Beyer D,
Huisman M, eds. Vol 10806. Springer; 2018:303-319. doi:10.1007/978-3-319-89963-3_18'
apa: 'Nickovic, D., Lebeltel, O., Maler, O., Ferrere, T., & Ulus, D. (2018).
AMT 2.0: Qualitative and quantitative trace analysis with extended signal temporal
logic. In D. Beyer & M. Huisman (Eds.) (Vol. 10806, pp. 303–319). Presented
at the TACAS: Tools and Algorithms for the Construction and Analysis of Systems,
Thessaloniki, Greece: Springer. https://doi.org/10.1007/978-3-319-89963-3_18'
chicago: 'Nickovic, Dejan, Olivier Lebeltel, Oded Maler, Thomas Ferrere, and Dogan
Ulus. “AMT 2.0: Qualitative and Quantitative Trace Analysis with Extended Signal
Temporal Logic.” edited by Dirk Beyer and Marieke Huisman, 10806:303–19. Springer,
2018. https://doi.org/10.1007/978-3-319-89963-3_18.'
ieee: 'D. Nickovic, O. Lebeltel, O. Maler, T. Ferrere, and D. Ulus, “AMT 2.0: Qualitative
and quantitative trace analysis with extended signal temporal logic,” presented
at the TACAS: Tools and Algorithms for the Construction and Analysis of Systems,
Thessaloniki, Greece, 2018, vol. 10806, pp. 303–319.'
ista: 'Nickovic D, Lebeltel O, Maler O, Ferrere T, Ulus D. 2018. AMT 2.0: Qualitative
and quantitative trace analysis with extended signal temporal logic. TACAS: Tools
and Algorithms for the Construction and Analysis of Systems, LNCS, vol. 10806,
303–319.'
mla: 'Nickovic, Dejan, et al. AMT 2.0: Qualitative and Quantitative Trace Analysis
with Extended Signal Temporal Logic. Edited by Dirk Beyer and Marieke Huisman,
vol. 10806, Springer, 2018, pp. 303–19, doi:10.1007/978-3-319-89963-3_18.'
short: D. Nickovic, O. Lebeltel, O. Maler, T. Ferrere, D. Ulus, in:, D. Beyer, M.
Huisman (Eds.), Springer, 2018, pp. 303–319.
conference:
end_date: 2018-04-20
location: Thessaloniki, Greece
name: 'TACAS: Tools and Algorithms for the Construction and Analysis of Systems'
start_date: 2018-04-14
date_created: 2018-12-11T11:45:41Z
date_published: 2018-04-14T00:00:00Z
date_updated: 2023-09-08T11:52:02Z
day: '14'
ddc:
- '000'
department:
- _id: ToHe
doi: 10.1007/978-3-319-89963-3_18
editor:
- first_name: Dirk
full_name: Beyer, Dirk
last_name: Beyer
- first_name: Marieke
full_name: Huisman, Marieke
last_name: Huisman
external_id:
isi:
- '00445822600018'
file:
- access_level: open_access
checksum: e11db3b9c8e27a1c7d1c738cc5e4d25a
content_type: application/pdf
creator: dernst
date_created: 2019-02-06T07:33:05Z
date_updated: 2020-07-14T12:45:58Z
file_id: '5928'
file_name: 2018_LNCS_Nickovic.pdf
file_size: 3267209
relation: main_file
file_date_updated: 2020-07-14T12:45:58Z
has_accepted_license: '1'
intvolume: ' 10806'
isi: 1
language:
- iso: eng
month: '04'
oa: 1
oa_version: Published Version
page: 303 - 319
publication_status: published
publisher: Springer
publist_id: '7582'
quality_controlled: '1'
related_material:
record:
- id: '10861'
relation: later_version
status: public
scopus_import: '1'
status: public
title: 'AMT 2.0: Qualitative and quantitative trace analysis with extended signal
temporal logic'
tmp:
image: /images/cc_by.png
legal_code_url: https://creativecommons.org/licenses/by/4.0/legalcode
name: Creative Commons Attribution 4.0 International Public License (CC-BY 4.0)
short: CC BY (4.0)
type: conference
user_id: c635000d-4b10-11ee-a964-aac5a93f6ac1
volume: 10806
year: '2018'
...
---
_id: '144'
abstract:
- lang: eng
text: The task of a monitor is to watch, at run-time, the execution of a reactive
system, and signal the occurrence of a safety violation in the observed sequence
of events. While finite-state monitors have been studied extensively, in practice,
monitoring software also makes use of unbounded memory. We define a model of automata
equipped with integer-valued registers which can execute only a bounded number
of instructions between consecutive events, and thus can form the theoretical
basis for the study of infinite-state monitors. We classify these register monitors
according to the number k of available registers, and the type of register instructions.
In stark contrast to the theory of computability for register machines, we prove
that for every k 1, monitors with k + 1 counters (with instruction set 〈+1, =〉)
are strictly more expressive than monitors with k counters. We also show that
adder monitors (with instruction set 〈1, +, =〉) are strictly more expressive than
counter monitors, but are complete for monitoring all computable safety -languages
for k = 6. Real-time monitors are further required to signal the occurrence of
a safety violation as soon as it occurs. The expressiveness hierarchy for counter
monitors carries over to real-time monitors. We then show that 2 adders cannot
simulate 3 counters in real-time. Finally, we show that real-time adder monitors
with inequalities are as expressive as real-time Turing machines.
alternative_title:
- ACM/IEEE Symposium on Logic in Computer Science
article_processing_charge: No
author:
- first_name: Thomas
full_name: Ferrere, Thomas
id: 40960E6E-F248-11E8-B48F-1D18A9856A87
last_name: Ferrere
orcid: 0000-0001-5199-3143
- first_name: Thomas A
full_name: Henzinger, Thomas A
id: 40876CD8-F248-11E8-B48F-1D18A9856A87
last_name: Henzinger
orcid: 0000−0002−2985−7724
- first_name: Ege
full_name: Saraç, Ege
last_name: Saraç
citation:
ama: 'Ferrere T, Henzinger TA, Saraç E. A theory of register monitors. In: Vol Part
F138033. IEEE; 2018:394-403. doi:10.1145/3209108.3209194'
apa: 'Ferrere, T., Henzinger, T. A., & Saraç, E. (2018). A theory of register
monitors (Vol. Part F138033, pp. 394–403). Presented at the LICS: Logic in Computer
Science, Oxford, UK: IEEE. https://doi.org/10.1145/3209108.3209194'
chicago: Ferrere, Thomas, Thomas A Henzinger, and Ege Saraç. “A Theory of Register
Monitors,” Part F138033:394–403. IEEE, 2018. https://doi.org/10.1145/3209108.3209194.
ieee: 'T. Ferrere, T. A. Henzinger, and E. Saraç, “A theory of register monitors,”
presented at the LICS: Logic in Computer Science, Oxford, UK, 2018, vol. Part
F138033, pp. 394–403.'
ista: 'Ferrere T, Henzinger TA, Saraç E. 2018. A theory of register monitors. LICS:
Logic in Computer Science, ACM/IEEE Symposium on Logic in Computer Science, vol.
Part F138033, 394–403.'
mla: Ferrere, Thomas, et al. A Theory of Register Monitors. Vol. Part F138033,
IEEE, 2018, pp. 394–403, doi:10.1145/3209108.3209194.
short: T. Ferrere, T.A. Henzinger, E. Saraç, in:, IEEE, 2018, pp. 394–403.
conference:
end_date: 2018-07-12
location: Oxford, UK
name: 'LICS: Logic in Computer Science'
start_date: 2018-07-09
date_created: 2018-12-11T11:44:52Z
date_published: 2018-07-09T00:00:00Z
date_updated: 2023-09-08T11:49:13Z
day: '09'
department:
- _id: ToHe
doi: 10.1145/3209108.3209194
external_id:
isi:
- '000545262800041'
isi: 1
language:
- iso: eng
month: '07'
oa_version: None
page: 394 - 403
publication_status: published
publisher: IEEE
publist_id: '7779'
quality_controlled: '1'
scopus_import: '1'
status: public
title: A theory of register monitors
type: conference
user_id: c635000d-4b10-11ee-a964-aac5a93f6ac1
volume: Part F138033
year: '2018'
...
---
_id: '182'
abstract:
- lang: eng
text: We describe a new algorithm for the parametric identification problem for
signal temporal logic (STL), stated as follows. Given a densetime real-valued
signal w and a parameterized temporal logic formula φ, compute the subset of the
parameter space that renders the formula satisfied by the signal. Unlike previous
solutions, which were based on search in the parameter space or quantifier elimination,
our procedure works recursively on φ and computes the evolution over time of the
set of valid parameter assignments. This procedure is similar to that of monitoring
or computing the robustness of φ relative to w. Our implementation and experiments
demonstrate that this approach can work well in practice.
alternative_title:
- HSCC Proceedings
article_processing_charge: No
author:
- first_name: Alexey
full_name: Bakhirkin, Alexey
last_name: Bakhirkin
- first_name: Thomas
full_name: Ferrere, Thomas
id: 40960E6E-F248-11E8-B48F-1D18A9856A87
last_name: Ferrere
orcid: 0000-0001-5199-3143
- first_name: Oded
full_name: Maler, Oded
last_name: Maler
citation:
ama: 'Bakhirkin A, Ferrere T, Maler O. Efficient parametric identification for STL.
In: Proceedings of the 21st International Conference on Hybrid Systems.
ACM; 2018:177-186. doi:10.1145/3178126.3178132'
apa: 'Bakhirkin, A., Ferrere, T., & Maler, O. (2018). Efficient parametric identification
for STL. In Proceedings of the 21st International Conference on Hybrid Systems
(pp. 177–186). Porto, Portugal: ACM. https://doi.org/10.1145/3178126.3178132'
chicago: Bakhirkin, Alexey, Thomas Ferrere, and Oded Maler. “Efficient Parametric
Identification for STL.” In Proceedings of the 21st International Conference
on Hybrid Systems, 177–86. ACM, 2018. https://doi.org/10.1145/3178126.3178132.
ieee: A. Bakhirkin, T. Ferrere, and O. Maler, “Efficient parametric identification
for STL,” in Proceedings of the 21st International Conference on Hybrid Systems,
Porto, Portugal, 2018, pp. 177–186.
ista: 'Bakhirkin A, Ferrere T, Maler O. 2018. Efficient parametric identification
for STL. Proceedings of the 21st International Conference on Hybrid Systems. HSCC:
Hybrid Systems: Computation and Control, HSCC Proceedings, , 177–186.'
mla: Bakhirkin, Alexey, et al. “Efficient Parametric Identification for STL.” Proceedings
of the 21st International Conference on Hybrid Systems, ACM, 2018, pp. 177–86,
doi:10.1145/3178126.3178132.
short: A. Bakhirkin, T. Ferrere, O. Maler, in:, Proceedings of the 21st International
Conference on Hybrid Systems, ACM, 2018, pp. 177–186.
conference:
end_date: 2018-04-13
location: Porto, Portugal
name: 'HSCC: Hybrid Systems: Computation and Control'
start_date: 2018-04-11
date_created: 2018-12-11T11:45:04Z
date_published: 2018-04-11T00:00:00Z
date_updated: 2023-09-11T13:30:51Z
day: '11'
ddc:
- '000'
department:
- _id: ToHe
doi: 10.1145/3178126.3178132
external_id:
isi:
- '000474781600020'
file:
- access_level: open_access
checksum: 81eabc96430e84336ea88310ac0a1ad0
content_type: application/pdf
creator: dernst
date_created: 2020-05-14T12:18:29Z
date_updated: 2020-07-14T12:45:17Z
file_id: '7833'
file_name: 2018_HSCC_Bakhirkin.pdf
file_size: 5900421
relation: main_file
file_date_updated: 2020-07-14T12:45:17Z
has_accepted_license: '1'
isi: 1
language:
- iso: eng
month: '04'
oa: 1
oa_version: Submitted Version
page: 177 - 186
project:
- _id: 25832EC2-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: S 11407_N23
name: Rigorous Systems Engineering
publication: Proceedings of the 21st International Conference on Hybrid Systems
publication_identifier:
isbn:
- '978-1-4503-5642-8 '
publication_status: published
publisher: ACM
publist_id: '7739'
quality_controlled: '1'
scopus_import: '1'
status: public
title: Efficient parametric identification for STL
type: conference
user_id: c635000d-4b10-11ee-a964-aac5a93f6ac1
year: '2018'
...
---
_id: '5788'
abstract:
- lang: eng
text: In two-player games on graphs, the players move a token through a graph to
produce an infinite path, which determines the winner or payoff of the game. Such
games are central in formal verification since they model the interaction between
a non-terminating system and its environment. We study bidding games in which
the players bid for the right to move the token. Two bidding rules have been defined.
In Richman bidding, in each round, the players simultaneously submit bids, and
the higher bidder moves the token and pays the other player. Poorman bidding is
similar except that the winner of the bidding pays the “bank” rather than the
other player. While poorman reachability games have been studied before, we present,
for the first time, results on infinite-duration poorman games. A central quantity
in these games is the ratio between the two players’ initial budgets. The questions
we study concern a necessary and sufficient ratio with which a player can achieve
a goal. For reachability objectives, such threshold ratios are known to exist
for both bidding rules. We show that the properties of poorman reachability games
extend to complex qualitative objectives such as parity, similarly to the Richman
case. Our most interesting results concern quantitative poorman games, namely
poorman mean-payoff games, where we construct optimal strategies depending on
the initial ratio, by showing a connection with random-turn based games. The connection
in itself is interesting, because it does not hold for reachability poorman games.
We also solve the complexity problems that arise in poorman bidding games.
alternative_title:
- LNCS
article_processing_charge: No
author:
- first_name: Guy
full_name: Avni, Guy
id: 463C8BC2-F248-11E8-B48F-1D18A9856A87
last_name: Avni
orcid: 0000-0001-5588-8287
- first_name: Thomas A
full_name: Henzinger, Thomas A
id: 40876CD8-F248-11E8-B48F-1D18A9856A87
last_name: Henzinger
orcid: 0000−0002−2985−7724
- first_name: Rasmus
full_name: Ibsen-Jensen, Rasmus
id: 3B699956-F248-11E8-B48F-1D18A9856A87
last_name: Ibsen-Jensen
orcid: 0000-0003-4783-0389
citation:
ama: 'Avni G, Henzinger TA, Ibsen-Jensen R. Infinite-duration poorman-bidding games.
In: Vol 11316. Springer; 2018:21-36. doi:10.1007/978-3-030-04612-5_2'
apa: 'Avni, G., Henzinger, T. A., & Ibsen-Jensen, R. (2018). Infinite-duration
poorman-bidding games (Vol. 11316, pp. 21–36). Presented at the 14th International
Conference on Web and Internet Economics, WINE, Oxford, UK: Springer. https://doi.org/10.1007/978-3-030-04612-5_2'
chicago: Avni, Guy, Thomas A Henzinger, and Rasmus Ibsen-Jensen. “Infinite-Duration
Poorman-Bidding Games,” 11316:21–36. Springer, 2018. https://doi.org/10.1007/978-3-030-04612-5_2.
ieee: G. Avni, T. A. Henzinger, and R. Ibsen-Jensen, “Infinite-duration poorman-bidding
games,” presented at the 14th International Conference on Web and Internet Economics,
WINE, Oxford, UK, 2018, vol. 11316, pp. 21–36.
ista: Avni G, Henzinger TA, Ibsen-Jensen R. 2018. Infinite-duration poorman-bidding
games. 14th International Conference on Web and Internet Economics, WINE, LNCS,
vol. 11316, 21–36.
mla: Avni, Guy, et al. Infinite-Duration Poorman-Bidding Games. Vol. 11316,
Springer, 2018, pp. 21–36, doi:10.1007/978-3-030-04612-5_2.
short: G. Avni, T.A. Henzinger, R. Ibsen-Jensen, in:, Springer, 2018, pp. 21–36.
conference:
end_date: 2018-12-17
location: Oxford, UK
name: 14th International Conference on Web and Internet Economics, WINE
start_date: 2018-12-15
date_created: 2018-12-30T22:59:14Z
date_published: 2018-11-21T00:00:00Z
date_updated: 2023-09-12T07:44:01Z
day: '21'
department:
- _id: ToHe
doi: 10.1007/978-3-030-04612-5_2
external_id:
arxiv:
- '1804.04372'
isi:
- '000865933000002'
intvolume: ' 11316'
isi: 1
language:
- iso: eng
main_file_link:
- open_access: '1'
url: https://arxiv.org/abs/1804.04372
month: '11'
oa: 1
oa_version: Preprint
page: 21-36
project:
- _id: 25F42A32-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: Z211
name: The Wittgenstein Prize
- _id: 25832EC2-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: S 11407_N23
name: Rigorous Systems Engineering
- _id: 264B3912-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: M02369
name: Formal Methods meets Algorithmic Game Theory
publication_identifier:
isbn:
- '9783030046118'
issn:
- '03029743'
publisher: Springer
quality_controlled: '1'
scopus_import: '1'
status: public
title: Infinite-duration poorman-bidding games
type: conference
user_id: c635000d-4b10-11ee-a964-aac5a93f6ac1
volume: 11316
year: '2018'
...
---
_id: '160'
abstract:
- lang: eng
text: We present layered concurrent programs, a compact and expressive notation
for specifying refinement proofs of concurrent programs. A layered concurrent
program specifies a sequence of connected concurrent programs, from most concrete
to most abstract, such that common parts of different programs are written exactly
once. These programs are expressed in the ordinary syntax of imperative concurrent
programs using gated atomic actions, sequencing, choice, and (recursive) procedure
calls. Each concurrent program is automatically extracted from the layered program.
We reduce refinement to the safety of a sequence of concurrent checker programs,
one each to justify the connection between every two consecutive concurrent programs.
These checker programs are also automatically extracted from the layered program.
Layered concurrent programs have been implemented in the CIVL verifier which has
been successfully used for the verification of several complex concurrent programs.
alternative_title:
- LNCS
article_processing_charge: No
author:
- first_name: Bernhard
full_name: Kragl, Bernhard
id: 320FC952-F248-11E8-B48F-1D18A9856A87
last_name: Kragl
orcid: 0000-0001-7745-9117
- first_name: Shaz
full_name: Qadeer, Shaz
last_name: Qadeer
citation:
ama: 'Kragl B, Qadeer S. Layered Concurrent Programs. In: Vol 10981. Springer; 2018:79-102.
doi:10.1007/978-3-319-96145-3_5'
apa: 'Kragl, B., & Qadeer, S. (2018). Layered Concurrent Programs (Vol. 10981,
pp. 79–102). Presented at the CAV: Computer Aided Verification, Oxford, UK: Springer.
https://doi.org/10.1007/978-3-319-96145-3_5'
chicago: Kragl, Bernhard, and Shaz Qadeer. “Layered Concurrent Programs,” 10981:79–102.
Springer, 2018. https://doi.org/10.1007/978-3-319-96145-3_5.
ieee: 'B. Kragl and S. Qadeer, “Layered Concurrent Programs,” presented at the CAV:
Computer Aided Verification, Oxford, UK, 2018, vol. 10981, pp. 79–102.'
ista: 'Kragl B, Qadeer S. 2018. Layered Concurrent Programs. CAV: Computer Aided
Verification, LNCS, vol. 10981, 79–102.'
mla: Kragl, Bernhard, and Shaz Qadeer. Layered Concurrent Programs. Vol.
10981, Springer, 2018, pp. 79–102, doi:10.1007/978-3-319-96145-3_5.
short: B. Kragl, S. Qadeer, in:, Springer, 2018, pp. 79–102.
conference:
end_date: 2018-07-17
location: Oxford, UK
name: 'CAV: Computer Aided Verification'
start_date: 2018-07-14
date_created: 2018-12-11T11:44:57Z
date_published: 2018-07-18T00:00:00Z
date_updated: 2023-09-13T08:45:09Z
day: '18'
ddc:
- '000'
department:
- _id: ToHe
doi: 10.1007/978-3-319-96145-3_5
external_id:
isi:
- '000491481600005'
file:
- access_level: open_access
checksum: c64fff560fe5a7532ec10626ad1c215e
content_type: application/pdf
creator: dernst
date_created: 2018-12-17T12:52:12Z
date_updated: 2020-07-14T12:45:04Z
file_id: '5705'
file_name: 2018_LNCS_Kragl.pdf
file_size: 1603844
relation: main_file
file_date_updated: 2020-07-14T12:45:04Z
has_accepted_license: '1'
intvolume: ' 10981'
isi: 1
language:
- iso: eng
month: '07'
oa: 1
oa_version: Published Version
page: 79 - 102
project:
- _id: 25F42A32-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: Z211
name: The Wittgenstein Prize
- _id: 25832EC2-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: S 11407_N23
name: Rigorous Systems Engineering
publication_status: published
publisher: Springer
publist_id: '7761'
quality_controlled: '1'
related_material:
record:
- id: '8332'
relation: dissertation_contains
status: public
scopus_import: '1'
status: public
title: Layered Concurrent Programs
tmp:
image: /images/cc_by.png
legal_code_url: https://creativecommons.org/licenses/by/4.0/legalcode
name: Creative Commons Attribution 4.0 International Public License (CC-BY 4.0)
short: CC BY (4.0)
type: conference
user_id: c635000d-4b10-11ee-a964-aac5a93f6ac1
volume: 10981
year: '2018'
...
---
_id: '183'
abstract:
- lang: eng
text: 'Fault-localization is considered to be a very tedious and time-consuming
activity in the design of complex Cyber-Physical Systems (CPS). This laborious
task essentially requires expert knowledge of the system in order to discover
the cause of the fault. In this context, we propose a new procedure that AIDS
designers in debugging Simulink/Stateflow hybrid system models, guided by Signal
Temporal Logic (STL) specifications. The proposed method relies on three main
ingredients: (1) a monitoring and a trace diagnostics procedure that checks whether
a tested behavior satisfies or violates an STL specification, localizes time segments
and interfaces variables contributing to the property violations; (2) a slicing
procedure that maps these observable behavior segments to the internal states
and transitions of the Simulink model; and (3) a spectrum-based fault-localization
method that combines the previous analysis from multiple tests to identify the
internal states and/or transitions that are the most likely to explain the fault.
We demonstrate the applicability of our approach on two Simulink models from the
automotive and the avionics domain.'
acknowledgement: This work was partially supported by the Austrian Science Fund (FWF)
under grants S11402-N23 and S11405-N23 (RiSE/SHiNE), the CPS/IoT project (HRSM),
the EU ICT COST Action IC1402 on Run-time Verification beyond Monitoring (ARVI),
the AMASS project (ECSEL 692474), and the ENABLE-S3 project (ECSEL 692455). The
CPS/IoT project receives support from the Austrian government through the Federal
Ministry of Science, Research and Economy (BMWFW) in the funding program Hochschulraum-Strukturmittel
(HRSM) 2016. The ECSEL Joint Undertaking receives support from the European Union’s
Horizon 2020 research and innovation programme and Austria, Denmark, Germany, Finland,
Czech Republic, Italy, Spain, Portugal, Poland, Ireland, Belgium, France, Netherlands,
United Kingdom, Slovakia, Norway.
alternative_title:
- HSCC Proceedings
article_processing_charge: No
author:
- first_name: Ezio
full_name: Bartocci, Ezio
last_name: Bartocci
- first_name: Thomas
full_name: Ferrere, Thomas
id: 40960E6E-F248-11E8-B48F-1D18A9856A87
last_name: Ferrere
orcid: 0000-0001-5199-3143
- first_name: Niveditha
full_name: Manjunath, Niveditha
last_name: Manjunath
- first_name: Dejan
full_name: Nickovic, Dejan
last_name: Nickovic
citation:
ama: 'Bartocci E, Ferrere T, Manjunath N, Nickovic D. Localizing faults in simulink/stateflow
models with STL. In: Association for Computing Machinery, Inc; 2018:197-206. doi:10.1145/3178126.3178131'
apa: 'Bartocci, E., Ferrere, T., Manjunath, N., & Nickovic, D. (2018). Localizing
faults in simulink/stateflow models with STL (pp. 197–206). Presented at the HSCC:
Hybrid Systems: Computation and Control, Porto, Portugal: Association for Computing
Machinery, Inc. https://doi.org/10.1145/3178126.3178131'
chicago: Bartocci, Ezio, Thomas Ferrere, Niveditha Manjunath, and Dejan Nickovic.
“Localizing Faults in Simulink/Stateflow Models with STL,” 197–206. Association
for Computing Machinery, Inc, 2018. https://doi.org/10.1145/3178126.3178131.
ieee: 'E. Bartocci, T. Ferrere, N. Manjunath, and D. Nickovic, “Localizing faults
in simulink/stateflow models with STL,” presented at the HSCC: Hybrid Systems:
Computation and Control, Porto, Portugal, 2018, pp. 197–206.'
ista: 'Bartocci E, Ferrere T, Manjunath N, Nickovic D. 2018. Localizing faults in
simulink/stateflow models with STL. HSCC: Hybrid Systems: Computation and Control,
HSCC Proceedings, , 197–206.'
mla: Bartocci, Ezio, et al. Localizing Faults in Simulink/Stateflow Models with
STL. Association for Computing Machinery, Inc, 2018, pp. 197–206, doi:10.1145/3178126.3178131.
short: E. Bartocci, T. Ferrere, N. Manjunath, D. Nickovic, in:, Association for
Computing Machinery, Inc, 2018, pp. 197–206.
conference:
end_date: 2018-04-13
location: Porto, Portugal
name: 'HSCC: Hybrid Systems: Computation and Control'
start_date: 2018-04-11
date_created: 2018-12-11T11:45:04Z
date_published: 2018-04-11T00:00:00Z
date_updated: 2023-09-13T08:48:46Z
day: '11'
department:
- _id: ToHe
doi: 10.1145/3178126.3178131
external_id:
isi:
- '000474781600022'
isi: 1
language:
- iso: eng
month: '04'
oa_version: None
page: 197 - 206
project:
- _id: 25832EC2-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: S 11407_N23
name: Rigorous Systems Engineering
publication_status: published
publisher: Association for Computing Machinery, Inc
publist_id: '7738'
quality_controlled: '1'
scopus_import: '1'
status: public
title: Localizing faults in simulink/stateflow models with STL
type: conference
user_id: c635000d-4b10-11ee-a964-aac5a93f6ac1
year: '2018'
...
---
_id: '81'
abstract:
- lang: eng
text: We solve the offline monitoring problem for timed propositional temporal logic
(TPTL), interpreted over dense-time Boolean signals. The variant of TPTL we consider
extends linear temporal logic (LTL) with clock variables and reset quantifiers,
providing a mechanism to specify real-time constraints. We first describe a general
monitoring algorithm based on an exhaustive computation of the set of satisfying
clock assignments as a finite union of zones. We then propose a specialized monitoring
algorithm for the one-variable case using a partition of the time domain based
on the notion of region equivalence, whose complexity is linear in the length
of the signal, thereby generalizing a known result regarding the monitoring of
metric temporal logic (MTL). The region and zone representations of time constraints
are known from timed automata verification and can also be used in the discrete-time
case. Our prototype implementation appears to outperform previous discrete-time
implementations of TPTL monitoring,
alternative_title:
- LNCS
article_processing_charge: No
author:
- first_name: Adrian
full_name: Elgyütt, Adrian
id: 4A2E9DBA-F248-11E8-B48F-1D18A9856A87
last_name: Elgyütt
- first_name: Thomas
full_name: Ferrere, Thomas
id: 40960E6E-F248-11E8-B48F-1D18A9856A87
last_name: Ferrere
orcid: 0000-0001-5199-3143
- first_name: Thomas A
full_name: Henzinger, Thomas A
id: 40876CD8-F248-11E8-B48F-1D18A9856A87
last_name: Henzinger
orcid: 0000−0002−2985−7724
citation:
ama: 'Elgyütt A, Ferrere T, Henzinger TA. Monitoring temporal logic with clock variables.
In: Vol 11022. Springer; 2018:53-70. doi:10.1007/978-3-030-00151-3_4'
apa: 'Elgyütt, A., Ferrere, T., & Henzinger, T. A. (2018). Monitoring temporal
logic with clock variables (Vol. 11022, pp. 53–70). Presented at the FORMATS:
Formal Modeling and Analysis of Timed Systems, Beijing, China: Springer. https://doi.org/10.1007/978-3-030-00151-3_4'
chicago: Elgyütt, Adrian, Thomas Ferrere, and Thomas A Henzinger. “Monitoring Temporal
Logic with Clock Variables,” 11022:53–70. Springer, 2018. https://doi.org/10.1007/978-3-030-00151-3_4.
ieee: 'A. Elgyütt, T. Ferrere, and T. A. Henzinger, “Monitoring temporal logic with
clock variables,” presented at the FORMATS: Formal Modeling and Analysis of Timed
Systems, Beijing, China, 2018, vol. 11022, pp. 53–70.'
ista: 'Elgyütt A, Ferrere T, Henzinger TA. 2018. Monitoring temporal logic with
clock variables. FORMATS: Formal Modeling and Analysis of Timed Systems, LNCS,
vol. 11022, 53–70.'
mla: Elgyütt, Adrian, et al. Monitoring Temporal Logic with Clock Variables.
Vol. 11022, Springer, 2018, pp. 53–70, doi:10.1007/978-3-030-00151-3_4.
short: A. Elgyütt, T. Ferrere, T.A. Henzinger, in:, Springer, 2018, pp. 53–70.
conference:
end_date: 2018-09-06
location: Beijing, China
name: 'FORMATS: Formal Modeling and Analysis of Timed Systems'
start_date: 2018-09-04
date_created: 2018-12-11T11:44:31Z
date_published: 2018-08-26T00:00:00Z
date_updated: 2023-09-13T08:58:34Z
day: '26'
ddc:
- '000'
department:
- _id: ToHe
doi: 10.1007/978-3-030-00151-3_4
external_id:
isi:
- '000884993200004'
file:
- access_level: open_access
checksum: e5d81c9b50a6bd9d8a2c16953aad7e23
content_type: application/pdf
creator: dernst
date_created: 2020-10-09T06:24:21Z
date_updated: 2020-10-09T06:24:21Z
file_id: '8638'
file_name: 2018_LNCS_Elgyuett.pdf
file_size: 537219
relation: main_file
success: 1
file_date_updated: 2020-10-09T06:24:21Z
has_accepted_license: '1'
intvolume: ' 11022'
isi: 1
language:
- iso: eng
month: '08'
oa: 1
oa_version: Submitted Version
page: 53 - 70
project:
- _id: 25F5A88A-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: S11402-N23
name: Moderne Concurrency Paradigms
- _id: 25F42A32-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: Z211
name: The Wittgenstein Prize
publication_status: published
publisher: Springer
publist_id: '7973'
quality_controlled: '1'
scopus_import: '1'
status: public
title: Monitoring temporal logic with clock variables
type: conference
user_id: c635000d-4b10-11ee-a964-aac5a93f6ac1
volume: 11022
year: '2018'
...
---
_id: '78'
abstract:
- lang: eng
text: We provide a procedure for detecting the sub-segments of an incrementally
observed Boolean signal ω that match a given temporal pattern ϕ. As a pattern
specification language, we use timed regular expressions, a formalism well-suited
for expressing properties of concurrent asynchronous behaviors embedded in metric
time. We construct a timed automaton accepting the timed language denoted by ϕ
and modify it slightly for the purpose of matching. We then apply zone-based reachability
computation to this automaton while it reads ω, and retrieve all the matching
segments from the results. Since the procedure is automaton based, it can be applied
to patterns specified by other formalisms such as timed temporal logics reducible
to timed automata or directly encoded as timed automata. The procedure has been
implemented and its performance on synthetic examples is demonstrated.
alternative_title:
- LNCS
article_processing_charge: No
author:
- first_name: Alexey
full_name: Bakhirkin, Alexey
last_name: Bakhirkin
- first_name: Thomas
full_name: Ferrere, Thomas
id: 40960E6E-F248-11E8-B48F-1D18A9856A87
last_name: Ferrere
orcid: 0000-0001-5199-3143
- first_name: Dejan
full_name: Nickovic, Dejan
last_name: Nickovic
- first_name: Oded
full_name: Maler, Oded
last_name: Maler
- first_name: Eugene
full_name: Asarin, Eugene
last_name: Asarin
citation:
ama: 'Bakhirkin A, Ferrere T, Nickovic D, Maler O, Asarin E. Online timed pattern
matching using automata. In: Vol 11022. Springer; 2018:215-232. doi:10.1007/978-3-030-00151-3_13'
apa: 'Bakhirkin, A., Ferrere, T., Nickovic, D., Maler, O., & Asarin, E. (2018).
Online timed pattern matching using automata (Vol. 11022, pp. 215–232). Presented
at the FORMATS: Formal Modeling and Analysis of Timed Systems, Bejing, China:
Springer. https://doi.org/10.1007/978-3-030-00151-3_13'
chicago: Bakhirkin, Alexey, Thomas Ferrere, Dejan Nickovic, Oded Maler, and Eugene
Asarin. “Online Timed Pattern Matching Using Automata,” 11022:215–32. Springer,
2018. https://doi.org/10.1007/978-3-030-00151-3_13.
ieee: 'A. Bakhirkin, T. Ferrere, D. Nickovic, O. Maler, and E. Asarin, “Online timed
pattern matching using automata,” presented at the FORMATS: Formal Modeling and
Analysis of Timed Systems, Bejing, China, 2018, vol. 11022, pp. 215–232.'
ista: 'Bakhirkin A, Ferrere T, Nickovic D, Maler O, Asarin E. 2018. Online timed
pattern matching using automata. FORMATS: Formal Modeling and Analysis of Timed
Systems, LNCS, vol. 11022, 215–232.'
mla: Bakhirkin, Alexey, et al. Online Timed Pattern Matching Using Automata.
Vol. 11022, Springer, 2018, pp. 215–32, doi:10.1007/978-3-030-00151-3_13.
short: A. Bakhirkin, T. Ferrere, D. Nickovic, O. Maler, E. Asarin, in:, Springer,
2018, pp. 215–232.
conference:
end_date: 2018-09-06
location: Bejing, China
name: 'FORMATS: Formal Modeling and Analysis of Timed Systems'
start_date: 2018-09-04
date_created: 2018-12-11T11:44:31Z
date_published: 2018-08-26T00:00:00Z
date_updated: 2023-09-13T09:35:46Z
day: '26'
ddc:
- '000'
department:
- _id: ToHe
doi: 10.1007/978-3-030-00151-3_13
external_id:
isi:
- '000884993200013'
file:
- access_level: open_access
checksum: 436b7574934324cfa7d1d3986fddc65b
content_type: application/pdf
creator: dernst
date_created: 2020-05-14T11:34:34Z
date_updated: 2020-07-14T12:48:03Z
file_id: '7831'
file_name: 2018_LNCS_Bakhirkin.pdf
file_size: 374851
relation: main_file
file_date_updated: 2020-07-14T12:48:03Z
has_accepted_license: '1'
intvolume: ' 11022'
isi: 1
language:
- iso: eng
month: '08'
oa: 1
oa_version: Submitted Version
page: 215 - 232
project:
- _id: 25832EC2-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: S 11407_N23
name: Rigorous Systems Engineering
- _id: 25F42A32-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: Z211
name: The Wittgenstein Prize
publication_identifier:
isbn:
- 978-3-030-00150-6
publication_status: published
publisher: Springer
publist_id: '7976'
quality_controlled: '1'
scopus_import: '1'
status: public
title: Online timed pattern matching using automata
type: conference
user_id: c635000d-4b10-11ee-a964-aac5a93f6ac1
volume: 11022
year: '2018'
...
---
_id: '79'
abstract:
- lang: eng
text: 'Markov Decision Processes (MDPs) are a popular class of models suitable for
solving control decision problems in probabilistic reactive systems. We consider
parametric MDPs (pMDPs) that include parameters in some of the transition probabilities
to account for stochastic uncertainties of the environment such as noise or input
disturbances. We study pMDPs with reachability objectives where the parameter
values are unknown and impossible to measure directly during execution, but there
is a probability distribution known over the parameter values. We study for the
first time computing parameter-independent strategies that are expectation optimal,
i.e., optimize the expected reachability probability under the probability distribution
over the parameters. We present an encoding of our problem to partially observable
MDPs (POMDPs), i.e., a reduction of our problem to computing optimal strategies
in POMDPs. We evaluate our method experimentally on several benchmarks: a motivating
(repeated) learner model; a series of benchmarks of varying configurations of
a robot moving on a grid; and a consensus protocol.'
alternative_title:
- LNCS
article_processing_charge: No
author:
- first_name: Sebastian
full_name: Arming, Sebastian
last_name: Arming
- first_name: Ezio
full_name: Bartocci, Ezio
last_name: Bartocci
- first_name: Krishnendu
full_name: Chatterjee, Krishnendu
id: 2E5DCA20-F248-11E8-B48F-1D18A9856A87
last_name: Chatterjee
orcid: 0000-0002-4561-241X
- first_name: Joost P
full_name: Katoen, Joost P
id: 4524F760-F248-11E8-B48F-1D18A9856A87
last_name: Katoen
- first_name: Ana
full_name: Sokolova, Ana
last_name: Sokolova
citation:
ama: 'Arming S, Bartocci E, Chatterjee K, Katoen JP, Sokolova A. Parameter-independent
strategies for pMDPs via POMDPs. In: Vol 11024. Springer; 2018:53-70. doi:10.1007/978-3-319-99154-2_4'
apa: 'Arming, S., Bartocci, E., Chatterjee, K., Katoen, J. P., & Sokolova, A.
(2018). Parameter-independent strategies for pMDPs via POMDPs (Vol. 11024, pp.
53–70). Presented at the QEST: Quantitative Evaluation of Systems, Beijing, China:
Springer. https://doi.org/10.1007/978-3-319-99154-2_4'
chicago: Arming, Sebastian, Ezio Bartocci, Krishnendu Chatterjee, Joost P Katoen,
and Ana Sokolova. “Parameter-Independent Strategies for PMDPs via POMDPs,” 11024:53–70.
Springer, 2018. https://doi.org/10.1007/978-3-319-99154-2_4.
ieee: 'S. Arming, E. Bartocci, K. Chatterjee, J. P. Katoen, and A. Sokolova, “Parameter-independent
strategies for pMDPs via POMDPs,” presented at the QEST: Quantitative Evaluation
of Systems, Beijing, China, 2018, vol. 11024, pp. 53–70.'
ista: 'Arming S, Bartocci E, Chatterjee K, Katoen JP, Sokolova A. 2018. Parameter-independent
strategies for pMDPs via POMDPs. QEST: Quantitative Evaluation of Systems, LNCS,
vol. 11024, 53–70.'
mla: Arming, Sebastian, et al. Parameter-Independent Strategies for PMDPs via
POMDPs. Vol. 11024, Springer, 2018, pp. 53–70, doi:10.1007/978-3-319-99154-2_4.
short: S. Arming, E. Bartocci, K. Chatterjee, J.P. Katoen, A. Sokolova, in:, Springer,
2018, pp. 53–70.
conference:
end_date: 2018-09-07
location: Beijing, China
name: 'QEST: Quantitative Evaluation of Systems'
start_date: 2018-09-04
date_created: 2018-12-11T11:44:31Z
date_published: 2018-08-15T00:00:00Z
date_updated: 2023-09-13T09:38:28Z
day: '15'
department:
- _id: KrCh
- _id: ToHe
doi: 10.1007/978-3-319-99154-2_4
external_id:
arxiv:
- '1806.05126'
isi:
- '000548912200004'
intvolume: ' 11024'
isi: 1
language:
- iso: eng
main_file_link:
- open_access: '1'
url: https://arxiv.org/abs/1806.05126
month: '08'
oa: 1
oa_version: Preprint
page: 53-70
publication_status: published
publisher: Springer
publist_id: '7975'
quality_controlled: '1'
scopus_import: '1'
status: public
title: Parameter-independent strategies for pMDPs via POMDPs
type: conference
user_id: c635000d-4b10-11ee-a964-aac5a93f6ac1
volume: 11024
year: '2018'
...
---
_id: '142'
abstract:
- lang: eng
text: We address the problem of analyzing the reachable set of a polynomial nonlinear
continuous system by over-approximating the flowpipe of its dynamics. The common
approach to tackle this problem is to perform a numerical integration over a given
time horizon based on Taylor expansion and interval arithmetic. However, this
method results to be very conservative when there is a large difference in speed
between trajectories as time progresses. In this paper, we propose to use combinations
of barrier functions, which we call piecewise barrier tube (PBT), to over-approximate
flowpipe. The basic idea of PBT is that for each segment of a flowpipe, a coarse
box which is big enough to contain the segment is constructed using sampled simulation
and then in the box we compute by linear programming a set of barrier functions
(called barrier tube or BT for short) which work together to form a tube surrounding
the flowpipe. The benefit of using PBT is that (1) BT is independent of time and
hence can avoid being stretched and deformed by time; and (2) a small number of
BTs can form a tight over-approximation for the flowpipe, which means that the
computation required to decide whether the BTs intersect the unsafe set can be
reduced significantly. We implemented a prototype called PBTS in C++. Experiments
on some benchmark systems show that our approach is effective.
acknowledgement: 'Austrian Science Fund FWF: S11402-N23, S11405-N23, Z211-N32'
alternative_title:
- LNCS
article_processing_charge: No
author:
- first_name: Hui
full_name: Kong, Hui
id: 3BDE25AA-F248-11E8-B48F-1D18A9856A87
last_name: Kong
orcid: 0000-0002-3066-6941
- first_name: Ezio
full_name: Bartocci, Ezio
last_name: Bartocci
- first_name: Thomas A
full_name: Henzinger, Thomas A
id: 40876CD8-F248-11E8-B48F-1D18A9856A87
last_name: Henzinger
orcid: 0000−0002−2985−7724
citation:
ama: 'Kong H, Bartocci E, Henzinger TA. Reachable set over-approximation for nonlinear
systems using piecewise barrier tubes. In: Vol 10981. Springer; 2018:449-467.
doi:10.1007/978-3-319-96145-3_24'
apa: 'Kong, H., Bartocci, E., & Henzinger, T. A. (2018). Reachable set over-approximation
for nonlinear systems using piecewise barrier tubes (Vol. 10981, pp. 449–467).
Presented at the CAV: Computer Aided Verification, Oxford, United Kingdom: Springer.
https://doi.org/10.1007/978-3-319-96145-3_24'
chicago: Kong, Hui, Ezio Bartocci, and Thomas A Henzinger. “Reachable Set Over-Approximation
for Nonlinear Systems Using Piecewise Barrier Tubes,” 10981:449–67. Springer,
2018. https://doi.org/10.1007/978-3-319-96145-3_24.
ieee: 'H. Kong, E. Bartocci, and T. A. Henzinger, “Reachable set over-approximation
for nonlinear systems using piecewise barrier tubes,” presented at the CAV: Computer
Aided Verification, Oxford, United Kingdom, 2018, vol. 10981, pp. 449–467.'
ista: 'Kong H, Bartocci E, Henzinger TA. 2018. Reachable set over-approximation
for nonlinear systems using piecewise barrier tubes. CAV: Computer Aided Verification,
LNCS, vol. 10981, 449–467.'
mla: Kong, Hui, et al. Reachable Set Over-Approximation for Nonlinear Systems
Using Piecewise Barrier Tubes. Vol. 10981, Springer, 2018, pp. 449–67, doi:10.1007/978-3-319-96145-3_24.
short: H. Kong, E. Bartocci, T.A. Henzinger, in:, Springer, 2018, pp. 449–467.
conference:
end_date: 2018-07-17
location: Oxford, United Kingdom
name: 'CAV: Computer Aided Verification'
start_date: 2018-07-14
date_created: 2018-12-11T11:44:51Z
date_published: 2018-07-18T00:00:00Z
date_updated: 2023-09-15T12:12:08Z
day: '18'
ddc:
- '000'
department:
- _id: ToHe
doi: 10.1007/978-3-319-96145-3_24
external_id:
isi:
- '000491481600024'
file:
- access_level: open_access
checksum: fd95e8026deacef3dc752a733bb9355f
content_type: application/pdf
creator: dernst
date_created: 2018-12-17T15:57:06Z
date_updated: 2020-07-14T12:44:53Z
file_id: '5718'
file_name: 2018_LNCS_Kong.pdf
file_size: 5591566
relation: main_file
file_date_updated: 2020-07-14T12:44:53Z
has_accepted_license: '1'
intvolume: ' 10981'
isi: 1
language:
- iso: eng
month: '07'
oa: 1
oa_version: Published Version
page: 449 - 467
project:
- _id: 25832EC2-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: S 11407_N23
name: Rigorous Systems Engineering
- _id: 25F42A32-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: Z211
name: The Wittgenstein Prize
publication_status: published
publisher: Springer
publist_id: '7781'
quality_controlled: '1'
scopus_import: '1'
status: public
title: Reachable set over-approximation for nonlinear systems using piecewise barrier
tubes
tmp:
image: /images/cc_by.png
legal_code_url: https://creativecommons.org/licenses/by/4.0/legalcode
name: Creative Commons Attribution 4.0 International Public License (CC-BY 4.0)
short: CC BY (4.0)
type: conference
user_id: c635000d-4b10-11ee-a964-aac5a93f6ac1
volume: 10981
year: '2018'
...
---
_id: '434'
abstract:
- lang: eng
text: In this paper, we present a formal model-driven design approach to establish
a safety-assured implementation of multifunction vehicle bus controller (MVBC),
which controls the data transmission among the devices of the vehicle. First,
the generic models and safety requirements described in International Electrotechnical
Commission Standard 61375 are formalized as time automata and timed computation
tree logic formulas, respectively. With model checking tool Uppaal, we verify
whether or not the constructed timed automata satisfy the formulas and several
logic inconsistencies in the original standard are detected and corrected. Then,
we apply the code generation tool Times to generate C code from the verified model,
which is later synthesized into a real MVBC chip, with some handwriting glue code.
Furthermore, the runtime verification tool RMOR is applied on the integrated code,
to verify some safety requirements that cannot be formalized on the timed automata.
For evaluation, we compare the proposed approach with existing MVBC design methods,
such as BeagleBone, Galsblock, and Simulink. Experiments show that more ambiguousness
or bugs in the standard are detected during Uppaal verification, and the generated
code of Times outperforms the C code generated by others in terms of the synthesized
binary code size. The errors in the standard have been confirmed and the resulting
MVBC has been deployed in the real train communication network.
article_processing_charge: No
author:
- first_name: Yu
full_name: Jiang, Yu
last_name: Jiang
- first_name: Han
full_name: Liu, Han
last_name: Liu
- first_name: Huobing
full_name: Song, Huobing
last_name: Song
- first_name: Hui
full_name: Kong, Hui
id: 3BDE25AA-F248-11E8-B48F-1D18A9856A87
last_name: Kong
orcid: 0000-0002-3066-6941
- first_name: Rui
full_name: Wang, Rui
last_name: Wang
- first_name: Yong
full_name: Guan, Yong
last_name: Guan
- first_name: Lui
full_name: Sha, Lui
last_name: Sha
citation:
ama: Jiang Y, Liu H, Song H, et al. Safety-assured model-driven design of the multifunction
vehicle bus controller. IEEE Transactions on Intelligent Transportation Systems.
2018;19(10):3320-3333. doi:10.1109/TITS.2017.2778077
apa: Jiang, Y., Liu, H., Song, H., Kong, H., Wang, R., Guan, Y., & Sha, L. (2018).
Safety-assured model-driven design of the multifunction vehicle bus controller.
IEEE Transactions on Intelligent Transportation Systems. IEEE. https://doi.org/10.1109/TITS.2017.2778077
chicago: Jiang, Yu, Han Liu, Huobing Song, Hui Kong, Rui Wang, Yong Guan, and Lui
Sha. “Safety-Assured Model-Driven Design of the Multifunction Vehicle Bus Controller.”
IEEE Transactions on Intelligent Transportation Systems. IEEE, 2018. https://doi.org/10.1109/TITS.2017.2778077.
ieee: Y. Jiang et al., “Safety-assured model-driven design of the multifunction
vehicle bus controller,” IEEE Transactions on Intelligent Transportation Systems,
vol. 19, no. 10. IEEE, pp. 3320–3333, 2018.
ista: Jiang Y, Liu H, Song H, Kong H, Wang R, Guan Y, Sha L. 2018. Safety-assured
model-driven design of the multifunction vehicle bus controller. IEEE Transactions
on Intelligent Transportation Systems. 19(10), 3320–3333.
mla: Jiang, Yu, et al. “Safety-Assured Model-Driven Design of the Multifunction
Vehicle Bus Controller.” IEEE Transactions on Intelligent Transportation Systems,
vol. 19, no. 10, IEEE, 2018, pp. 3320–33, doi:10.1109/TITS.2017.2778077.
short: Y. Jiang, H. Liu, H. Song, H. Kong, R. Wang, Y. Guan, L. Sha, IEEE Transactions
on Intelligent Transportation Systems 19 (2018) 3320–3333.
date_created: 2018-12-11T11:46:27Z
date_published: 2018-01-01T00:00:00Z
date_updated: 2023-09-18T08:12:49Z
day: '01'
department:
- _id: ToHe
doi: 10.1109/TITS.2017.2778077
external_id:
isi:
- '000446651100020'
intvolume: ' 19'
isi: 1
issue: '10'
language:
- iso: eng
month: '01'
oa_version: None
page: 3320 - 3333
publication: IEEE Transactions on Intelligent Transportation Systems
publication_status: published
publisher: IEEE
publist_id: '7389'
quality_controlled: '1'
related_material:
record:
- id: '1205'
relation: earlier_version
status: public
scopus_import: '1'
status: public
title: Safety-assured model-driven design of the multifunction vehicle bus controller
type: journal_article
user_id: c635000d-4b10-11ee-a964-aac5a93f6ac1
volume: 19
year: '2018'
...
---
_id: '140'
abstract:
- lang: eng
text: Reachability analysis is difficult for hybrid automata with affine differential
equations, because the reach set needs to be approximated. Promising abstraction
techniques usually employ interval methods or template polyhedra. Interval methods
account for dense time and guarantee soundness, and there are interval-based tools
that overapproximate affine flowpipes. But interval methods impose bounded and
rigid shapes, which make refinement expensive and fixpoint detection difficult.
Template polyhedra, on the other hand, can be adapted flexibly and can be unbounded,
but sound template refinement for unbounded reachability analysis has been implemented
only for systems with piecewise constant dynamics. We capitalize on the advantages
of both techniques, combining interval arithmetic and template polyhedra, using
the former to abstract time and the latter to abstract space. During a CEGAR loop,
whenever a spurious error trajectory is found, we compute additional space constraints
and split time intervals, and use these space-time interpolants to eliminate the
counterexample. Space-time interpolation offers a lazy, flexible framework for
increasing precision while guaranteeing soundness, both for error avoidance and
fixpoint detection. To the best of out knowledge, this is the first abstraction
refinement scheme for the reachability analysis over unbounded and dense time
of affine hybrid systems, which is both sound and automatic. We demonstrate the
effectiveness of our algorithm with several benchmark examples, which cannot be
handled by other tools.
alternative_title:
- LNCS
article_processing_charge: No
author:
- first_name: Goran
full_name: Frehse, Goran
last_name: Frehse
- first_name: Mirco
full_name: Giacobbe, Mirco
id: 3444EA5E-F248-11E8-B48F-1D18A9856A87
last_name: Giacobbe
orcid: 0000-0001-8180-0904
- first_name: Thomas A
full_name: Henzinger, Thomas A
id: 40876CD8-F248-11E8-B48F-1D18A9856A87
last_name: Henzinger
orcid: 0000−0002−2985−7724
citation:
ama: 'Frehse G, Giacobbe M, Henzinger TA. Space-time interpolants. In: Vol 10981.
Springer; 2018:468-486. doi:10.1007/978-3-319-96145-3_25'
apa: 'Frehse, G., Giacobbe, M., & Henzinger, T. A. (2018). Space-time interpolants
(Vol. 10981, pp. 468–486). Presented at the CAV: Computer Aided Verification,
Oxford, United Kingdom: Springer. https://doi.org/10.1007/978-3-319-96145-3_25'
chicago: Frehse, Goran, Mirco Giacobbe, and Thomas A Henzinger. “Space-Time Interpolants,”
10981:468–86. Springer, 2018. https://doi.org/10.1007/978-3-319-96145-3_25.
ieee: 'G. Frehse, M. Giacobbe, and T. A. Henzinger, “Space-time interpolants,” presented
at the CAV: Computer Aided Verification, Oxford, United Kingdom, 2018, vol. 10981,
pp. 468–486.'
ista: 'Frehse G, Giacobbe M, Henzinger TA. 2018. Space-time interpolants. CAV: Computer
Aided Verification, LNCS, vol. 10981, 468–486.'
mla: Frehse, Goran, et al. Space-Time Interpolants. Vol. 10981, Springer,
2018, pp. 468–86, doi:10.1007/978-3-319-96145-3_25.
short: G. Frehse, M. Giacobbe, T.A. Henzinger, in:, Springer, 2018, pp. 468–486.
conference:
end_date: 2018-07-17
location: Oxford, United Kingdom
name: 'CAV: Computer Aided Verification'
start_date: 2018-07-14
date_created: 2018-12-11T11:44:50Z
date_published: 2018-07-18T00:00:00Z
date_updated: 2023-09-19T09:30:43Z
day: '18'
ddc:
- '005'
department:
- _id: ToHe
doi: 10.1007/978-3-319-96145-3_25
external_id:
isi:
- '000491481600025'
file:
- access_level: open_access
checksum: 6dca832f575d6b3f0ea9dff56f579142
content_type: application/pdf
creator: system
date_created: 2018-12-12T10:17:53Z
date_updated: 2020-07-14T12:44:50Z
file_id: '5310'
file_name: IST-2018-1010-v1+1_space-time_interpolants.pdf
file_size: 563710
relation: main_file
file_date_updated: 2020-07-14T12:44:50Z
has_accepted_license: '1'
intvolume: ' 10981'
isi: 1
language:
- iso: eng
month: '07'
oa: 1
oa_version: Published Version
page: 468 - 486
project:
- _id: 25832EC2-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: S 11407_N23
name: Rigorous Systems Engineering
- _id: 25F5A88A-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: S11402-N23
name: Moderne Concurrency Paradigms
publication_identifier:
issn:
- '03029743'
publication_status: published
publisher: Springer
publist_id: '7783'
pubrep_id: '1010'
quality_controlled: '1'
related_material:
record:
- id: '6894'
relation: dissertation_contains
status: public
scopus_import: '1'
status: public
title: Space-time interpolants
tmp:
image: /images/cc_by.png
legal_code_url: https://creativecommons.org/licenses/by/4.0/legalcode
name: Creative Commons Attribution 4.0 International Public License (CC-BY 4.0)
short: CC BY (4.0)
type: conference
user_id: c635000d-4b10-11ee-a964-aac5a93f6ac1
volume: 10981
year: '2018'
...
---
_id: '297'
abstract:
- lang: eng
text: Graph games played by two players over finite-state graphs are central in
many problems in computer science. In particular, graph games with ω -regular
winning conditions, specified as parity objectives, which can express properties
such as safety, liveness, fairness, are the basic framework for verification and
synthesis of reactive systems. The decisions for a player at various states of
the graph game are represented as strategies. While the algorithmic problem for
solving graph games with parity objectives has been widely studied, the most prominent
data-structure for strategy representation in graph games has been binary decision
diagrams (BDDs). However, due to the bit-level representation, BDDs do not retain
the inherent flavor of the decisions of strategies, and are notoriously hard to
minimize to obtain succinct representation. In this work we propose decision trees
for strategy representation in graph games. Decision trees retain the flavor of
decisions of strategies and allow entropy-based minimization to obtain succinct
trees. However, decision trees work in settings (e.g., probabilistic models) where
errors are allowed, and overfitting of data is typically avoided. In contrast,
for strategies in graph games no error is allowed, and the decision tree must
represent the entire strategy. We develop new techniques to extend decision trees
to overcome the above obstacles, while retaining the entropy-based techniques
to obtain succinct trees. We have implemented our techniques to extend the existing
decision tree solvers. We present experimental results for problems in reactive
synthesis to show that decision trees provide a much more efficient data-structure
for strategy representation as compared to BDDs.
alternative_title:
- LNCS
article_processing_charge: No
author:
- first_name: Tomáš
full_name: Brázdil, Tomáš
last_name: Brázdil
- first_name: Krishnendu
full_name: Chatterjee, Krishnendu
id: 2E5DCA20-F248-11E8-B48F-1D18A9856A87
last_name: Chatterjee
orcid: 0000-0002-4561-241X
- first_name: Jan
full_name: Kretinsky, Jan
id: 44CEF464-F248-11E8-B48F-1D18A9856A87
last_name: Kretinsky
orcid: 0000-0002-8122-2881
- first_name: Viktor
full_name: Toman, Viktor
id: 3AF3DA7C-F248-11E8-B48F-1D18A9856A87
last_name: Toman
orcid: 0000-0001-9036-063X
citation:
ama: 'Brázdil T, Chatterjee K, Kretinsky J, Toman V. Strategy representation by
decision trees in reactive synthesis. In: Vol 10805. Springer; 2018:385-407. doi:10.1007/978-3-319-89960-2_21'
apa: 'Brázdil, T., Chatterjee, K., Kretinsky, J., & Toman, V. (2018). Strategy
representation by decision trees in reactive synthesis (Vol. 10805, pp. 385–407).
Presented at the TACAS 2018: Tools and Algorithms for the Construction and Analysis
of Systems, Thessaloniki, Greece: Springer. https://doi.org/10.1007/978-3-319-89960-2_21'
chicago: Brázdil, Tomáš, Krishnendu Chatterjee, Jan Kretinsky, and Viktor Toman.
“Strategy Representation by Decision Trees in Reactive Synthesis,” 10805:385–407.
Springer, 2018. https://doi.org/10.1007/978-3-319-89960-2_21.
ieee: 'T. Brázdil, K. Chatterjee, J. Kretinsky, and V. Toman, “Strategy representation
by decision trees in reactive synthesis,” presented at the TACAS 2018: Tools and
Algorithms for the Construction and Analysis of Systems, Thessaloniki, Greece,
2018, vol. 10805, pp. 385–407.'
ista: 'Brázdil T, Chatterjee K, Kretinsky J, Toman V. 2018. Strategy representation
by decision trees in reactive synthesis. TACAS 2018: Tools and Algorithms for
the Construction and Analysis of Systems, LNCS, vol. 10805, 385–407.'
mla: Brázdil, Tomáš, et al. Strategy Representation by Decision Trees in Reactive
Synthesis. Vol. 10805, Springer, 2018, pp. 385–407, doi:10.1007/978-3-319-89960-2_21.
short: T. Brázdil, K. Chatterjee, J. Kretinsky, V. Toman, in:, Springer, 2018, pp.
385–407.
conference:
end_date: 2018-04-20
location: Thessaloniki, Greece
name: 'TACAS 2018: Tools and Algorithms for the Construction and Analysis of Systems'
start_date: 2018-04-14
date_created: 2018-12-11T11:45:41Z
date_published: 2018-04-12T00:00:00Z
date_updated: 2023-09-19T09:57:08Z
day: '12'
ddc:
- '000'
department:
- _id: KrCh
- _id: ToHe
doi: 10.1007/978-3-319-89960-2_21
ec_funded: 1
external_id:
isi:
- '000546326300021'
file:
- access_level: open_access
checksum: b13874ffb114932ad9cc2586b7469db4
content_type: application/pdf
creator: dernst
date_created: 2018-12-17T16:29:08Z
date_updated: 2020-07-14T12:45:57Z
file_id: '5723'
file_name: 2018_LNCS_Brazdil.pdf
file_size: 1829940
relation: main_file
file_date_updated: 2020-07-14T12:45:57Z
has_accepted_license: '1'
intvolume: ' 10805'
isi: 1
language:
- iso: eng
month: '04'
oa: 1
oa_version: Published Version
page: 385 - 407
project:
- _id: 25892FC0-B435-11E9-9278-68D0E5697425
grant_number: ICT15-003
name: Efficient Algorithms for Computer Aided Verification
- _id: 25832EC2-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: S 11407_N23
name: Rigorous Systems Engineering
- _id: 2581B60A-B435-11E9-9278-68D0E5697425
call_identifier: FP7
grant_number: '279307'
name: 'Quantitative Graph Games: Theory and Applications'
- _id: 2564DBCA-B435-11E9-9278-68D0E5697425
call_identifier: H2020
grant_number: '665385'
name: International IST Doctoral Program
publication_status: published
publisher: Springer
publist_id: '7584'
quality_controlled: '1'
scopus_import: '1'
status: public
title: Strategy representation by decision trees in reactive synthesis
tmp:
image: /images/cc_by.png
legal_code_url: https://creativecommons.org/licenses/by/4.0/legalcode
name: Creative Commons Attribution 4.0 International Public License (CC-BY 4.0)
short: CC BY (4.0)
type: conference
user_id: c635000d-4b10-11ee-a964-aac5a93f6ac1
volume: 10805
year: '2018'
...
---
_id: '608'
abstract:
- lang: eng
text: Synthesis is the automated construction of a system from its specification.
In real life, hardware and software systems are rarely constructed from scratch.
Rather, a system is typically constructed from a library of components. Lustig
and Vardi formalized this intuition and studied LTL synthesis from component libraries.
In real life, designers seek optimal systems. In this paper we add optimality
considerations to the setting. We distinguish between quality considerations (for
example, size - the smaller a system is, the better it is), and pricing (for example,
the payment to the company who manufactured the component). We study the problem
of designing systems with minimal quality-cost and price. A key point is that
while the quality cost is individual - the choices of a designer are independent
of choices made by other designers that use the same library, pricing gives rise
to a resource-allocation game - designers that use the same component share its
price, with the share being proportional to the number of uses (a component can
be used several times in a design). We study both closed and open settings, and
in both we solve the problem of finding an optimal design. In a setting with multiple
designers, we also study the game-theoretic problems of the induced resource-allocation
game.
article_processing_charge: No
article_type: original
author:
- first_name: Guy
full_name: Avni, Guy
id: 463C8BC2-F248-11E8-B48F-1D18A9856A87
last_name: Avni
orcid: 0000-0001-5588-8287
- first_name: Orna
full_name: Kupferman, Orna
last_name: Kupferman
citation:
ama: Avni G, Kupferman O. Synthesis from component libraries with costs. Theoretical
Computer Science. 2018;712:50-72. doi:10.1016/j.tcs.2017.11.001
apa: Avni, G., & Kupferman, O. (2018). Synthesis from component libraries with
costs. Theoretical Computer Science. Elsevier. https://doi.org/10.1016/j.tcs.2017.11.001
chicago: Avni, Guy, and Orna Kupferman. “Synthesis from Component Libraries with
Costs.” Theoretical Computer Science. Elsevier, 2018. https://doi.org/10.1016/j.tcs.2017.11.001.
ieee: G. Avni and O. Kupferman, “Synthesis from component libraries with costs,”
Theoretical Computer Science, vol. 712. Elsevier, pp. 50–72, 2018.
ista: Avni G, Kupferman O. 2018. Synthesis from component libraries with costs.
Theoretical Computer Science. 712, 50–72.
mla: Avni, Guy, and Orna Kupferman. “Synthesis from Component Libraries with Costs.”
Theoretical Computer Science, vol. 712, Elsevier, 2018, pp. 50–72, doi:10.1016/j.tcs.2017.11.001.
short: G. Avni, O. Kupferman, Theoretical Computer Science 712 (2018) 50–72.
date_created: 2018-12-11T11:47:28Z
date_published: 2018-02-15T00:00:00Z
date_updated: 2023-09-19T10:00:21Z
day: '15'
department:
- _id: ToHe
doi: 10.1016/j.tcs.2017.11.001
ec_funded: 1
external_id:
isi:
- '000424959200003'
intvolume: ' 712'
isi: 1
language:
- iso: eng
main_file_link:
- open_access: '1'
url: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.636.4529
month: '02'
oa: 1
oa_version: Published Version
page: 50 - 72
project:
- _id: 25EE3708-B435-11E9-9278-68D0E5697425
call_identifier: FP7
grant_number: '267989'
name: Quantitative Reactive Modeling
- _id: 25832EC2-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: S 11407_N23
name: Rigorous Systems Engineering
- _id: 25F42A32-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: Z211
name: The Wittgenstein Prize
publication: Theoretical Computer Science
publication_status: published
publisher: Elsevier
publist_id: '7197'
quality_controlled: '1'
scopus_import: '1'
status: public
title: Synthesis from component libraries with costs
type: journal_article
user_id: c635000d-4b10-11ee-a964-aac5a93f6ac1
volume: 712
year: '2018'
...
---
_id: '156'
abstract:
- lang: eng
text: 'Imprecision in timing can sometimes be beneficial: Metric interval temporal
logic (MITL), disabling the expression of punctuality constraints, was shown to
translate to timed automata, yielding an elementary decision procedure. We show
how this principle extends to other forms of dense-time specification using regular
expressions. By providing a clean, automaton-based formal framework for non-punctual
languages, we are able to recover and extend several results in timed systems.
Metric interval regular expressions (MIRE) are introduced, providing regular expressions
with non-singular duration constraints. We obtain that MIRE are expressively complete
relative to a class of one-clock timed automata, which can be determinized using
additional clocks. Metric interval dynamic logic (MIDL) is then defined using
MIRE as temporal modalities. We show that MIDL generalizes known extensions of
MITL, while translating to timed automata at comparable cost.'
alternative_title:
- LNCS
article_processing_charge: No
author:
- first_name: Thomas
full_name: Ferrere, Thomas
id: 40960E6E-F248-11E8-B48F-1D18A9856A87
last_name: Ferrere
orcid: 0000-0001-5199-3143
citation:
ama: 'Ferrere T. The compound interest in relaxing punctuality. In: Vol 10951. Springer;
2018:147-164. doi:10.1007/978-3-319-95582-7_9'
apa: 'Ferrere, T. (2018). The compound interest in relaxing punctuality (Vol. 10951,
pp. 147–164). Presented at the FM: International Symposium on Formal Methods,
Oxford, UK: Springer. https://doi.org/10.1007/978-3-319-95582-7_9'
chicago: Ferrere, Thomas. “The Compound Interest in Relaxing Punctuality,” 10951:147–64.
Springer, 2018. https://doi.org/10.1007/978-3-319-95582-7_9.
ieee: 'T. Ferrere, “The compound interest in relaxing punctuality,” presented at
the FM: International Symposium on Formal Methods, Oxford, UK, 2018, vol. 10951,
pp. 147–164.'
ista: 'Ferrere T. 2018. The compound interest in relaxing punctuality. FM: International
Symposium on Formal Methods, LNCS, vol. 10951, 147–164.'
mla: Ferrere, Thomas. The Compound Interest in Relaxing Punctuality. Vol.
10951, Springer, 2018, pp. 147–64, doi:10.1007/978-3-319-95582-7_9.
short: T. Ferrere, in:, Springer, 2018, pp. 147–164.
conference:
end_date: 2018-07-17
location: Oxford, UK
name: 'FM: International Symposium on Formal Methods'
start_date: 2018-07-15
date_created: 2018-12-11T11:44:55Z
date_published: 2018-07-12T00:00:00Z
date_updated: 2023-09-19T10:05:37Z
day: '12'
ddc:
- '000'
department:
- _id: ToHe
doi: 10.1007/978-3-319-95582-7_9
external_id:
isi:
- '000489765800009'
file:
- access_level: open_access
checksum: a045c213c42c445f1889326f8db82a0a
content_type: application/pdf
creator: dernst
date_created: 2020-10-09T06:22:41Z
date_updated: 2020-10-09T06:22:41Z
file_id: '8637'
file_name: 2018_LNCS_Ferrere.pdf
file_size: 485576
relation: main_file
success: 1
file_date_updated: 2020-10-09T06:22:41Z
has_accepted_license: '1'
intvolume: ' 10951'
isi: 1
language:
- iso: eng
month: '07'
oa: 1
oa_version: Submitted Version
page: 147 - 164
project:
- _id: 25F42A32-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: Z211
name: The Wittgenstein Prize
- _id: 25832EC2-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: S 11407_N23
name: Rigorous Systems Engineering
publication_status: published
publisher: Springer
publist_id: '7765'
quality_controlled: '1'
scopus_import: '1'
status: public
title: The compound interest in relaxing punctuality
type: conference
user_id: c635000d-4b10-11ee-a964-aac5a93f6ac1
volume: 10951
year: '2018'
...
---
_id: '5959'
abstract:
- lang: eng
text: Formalizing properties of systems with continuous dynamics is a challenging
task. In this paper, we propose a formal framework for specifying and monitoring
rich temporal properties of real-valued signals. We introduce signal first-order
logic (SFO) as a specification language that combines first-order logic with linear-real
arithmetic and unary function symbols interpreted as piecewise-linear signals.
We first show that while the satisfiability problem for SFO is undecidable, its
membership and monitoring problems are decidable. We develop an offline monitoring
procedure for SFO that has polynomial complexity in the size of the input trace
and the specification, for a fixed number of quantifiers and function symbols.
We show that the algorithm has computation time linear in the size of the input
trace for the important fragment of bounded-response specifications interpreted
over input traces with finite variability. We can use our results to extend signal
temporal logic with first-order quantifiers over time and value parameters, while
preserving its efficient monitoring. We finally demonstrate the practical appeal
of our logic through a case study in the micro-electronics domain.
article_processing_charge: No
author:
- first_name: Alexey
full_name: Bakhirkin, Alexey
last_name: Bakhirkin
- first_name: Thomas
full_name: Ferrere, Thomas
id: 40960E6E-F248-11E8-B48F-1D18A9856A87
last_name: Ferrere
orcid: 0000-0001-5199-3143
- first_name: Thomas A
full_name: Henzinger, Thomas A
id: 40876CD8-F248-11E8-B48F-1D18A9856A87
last_name: Henzinger
orcid: 0000−0002−2985−7724
- first_name: Deian
full_name: Nickovicl, Deian
last_name: Nickovicl
citation:
ama: 'Bakhirkin A, Ferrere T, Henzinger TA, Nickovicl D. Keynote: The first-order
logic of signals. In: 2018 International Conference on Embedded Software.
IEEE; 2018:1-10. doi:10.1109/emsoft.2018.8537203'
apa: 'Bakhirkin, A., Ferrere, T., Henzinger, T. A., & Nickovicl, D. (2018).
Keynote: The first-order logic of signals. In 2018 International Conference
on Embedded Software (pp. 1–10). Turin, Italy: IEEE. https://doi.org/10.1109/emsoft.2018.8537203'
chicago: 'Bakhirkin, Alexey, Thomas Ferrere, Thomas A Henzinger, and Deian Nickovicl.
“Keynote: The First-Order Logic of Signals.” In 2018 International Conference
on Embedded Software, 1–10. IEEE, 2018. https://doi.org/10.1109/emsoft.2018.8537203.'
ieee: 'A. Bakhirkin, T. Ferrere, T. A. Henzinger, and D. Nickovicl, “Keynote: The
first-order logic of signals,” in 2018 International Conference on Embedded
Software, Turin, Italy, 2018, pp. 1–10.'
ista: 'Bakhirkin A, Ferrere T, Henzinger TA, Nickovicl D. 2018. Keynote: The first-order
logic of signals. 2018 International Conference on Embedded Software. EMSOFT:
International Conference on Embedded Software, 1–10.'
mla: 'Bakhirkin, Alexey, et al. “Keynote: The First-Order Logic of Signals.” 2018
International Conference on Embedded Software, IEEE, 2018, pp. 1–10, doi:10.1109/emsoft.2018.8537203.'
short: A. Bakhirkin, T. Ferrere, T.A. Henzinger, D. Nickovicl, in:, 2018 International
Conference on Embedded Software, IEEE, 2018, pp. 1–10.
conference:
end_date: 2018-10-05
location: Turin, Italy
name: 'EMSOFT: International Conference on Embedded Software'
start_date: 2018-09-30
date_created: 2019-02-13T09:19:28Z
date_published: 2018-09-30T00:00:00Z
date_updated: 2023-09-19T10:41:29Z
day: '30'
ddc:
- '000'
department:
- _id: ToHe
doi: 10.1109/emsoft.2018.8537203
external_id:
isi:
- '000492828500005'
file:
- access_level: open_access
checksum: 234a33ad9055b3458fcdda6af251b33a
content_type: application/pdf
creator: dernst
date_created: 2020-05-14T16:01:29Z
date_updated: 2020-07-14T12:47:13Z
file_id: '7839'
file_name: 2018_EMSOFT_Bakhirkin.pdf
file_size: 338006
relation: main_file
file_date_updated: 2020-07-14T12:47:13Z
has_accepted_license: '1'
isi: 1
language:
- iso: eng
month: '09'
oa: 1
oa_version: Published Version
page: 1-10
project:
- _id: 25832EC2-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: S 11407_N23
name: Rigorous Systems Engineering
- _id: 25F42A32-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: Z211
name: The Wittgenstein Prize
publication: 2018 International Conference on Embedded Software
publication_identifier:
isbn:
- '9781538655603'
publication_status: published
publisher: IEEE
quality_controlled: '1'
scopus_import: '1'
status: public
title: 'Keynote: The first-order logic of signals'
type: conference
user_id: c635000d-4b10-11ee-a964-aac5a93f6ac1
year: '2018'
...
---
_id: '24'
abstract:
- lang: eng
text: Partially-observable Markov decision processes (POMDPs) with discounted-sum
payoff are a standard framework to model a wide range of problems related to decision
making under uncertainty. Traditionally, the goal has been to obtain policies
that optimize the expectation of the discounted-sum payoff. A key drawback of
the expectation measure is that even low probability events with extreme payoff
can significantly affect the expectation, and thus the obtained policies are not
necessarily risk-averse. An alternate approach is to optimize the probability
that the payoff is above a certain threshold, which allows obtaining risk-averse
policies, but ignores optimization of the expectation. We consider the expectation
optimization with probabilistic guarantee (EOPG) problem, where the goal is to
optimize the expectation ensuring that the payoff is above a given threshold with
at least a specified probability. We present several results on the EOPG problem,
including the first algorithm to solve it.
acknowledgement: "This research was supported by the Vienna Science and Technology
Fund (WWTF) grant ICT15-003; Austrian Science Fund (FWF): S11407-N23(RiSE/SHiNE);and
an ERC Start Grant (279307:Graph Games).\r\n"
article_processing_charge: No
author:
- first_name: Krishnendu
full_name: Chatterjee, Krishnendu
id: 2E5DCA20-F248-11E8-B48F-1D18A9856A87
last_name: Chatterjee
orcid: 0000-0002-4561-241X
- first_name: Adrian
full_name: Elgyütt, Adrian
id: 4A2E9DBA-F248-11E8-B48F-1D18A9856A87
last_name: Elgyütt
- first_name: Petr
full_name: Novotny, Petr
id: 3CC3B868-F248-11E8-B48F-1D18A9856A87
last_name: Novotny
- first_name: Owen
full_name: Rouillé, Owen
last_name: Rouillé
citation:
ama: 'Chatterjee K, Elgyütt A, Novotný P, Rouillé O. Expectation optimization with
probabilistic guarantees in POMDPs with discounted-sum objectives. In: Vol 2018.
IJCAI; 2018:4692-4699. doi:10.24963/ijcai.2018/652'
apa: 'Chatterjee, K., Elgyütt, A., Novotný, P., & Rouillé, O. (2018). Expectation
optimization with probabilistic guarantees in POMDPs with discounted-sum objectives
(Vol. 2018, pp. 4692–4699). Presented at the IJCAI: International Joint Conference
on Artificial Intelligence, Stockholm, Sweden: IJCAI. https://doi.org/10.24963/ijcai.2018/652'
chicago: Chatterjee, Krishnendu, Adrian Elgyütt, Petr Novotný, and Owen Rouillé.
“Expectation Optimization with Probabilistic Guarantees in POMDPs with Discounted-Sum
Objectives,” 2018:4692–99. IJCAI, 2018. https://doi.org/10.24963/ijcai.2018/652.
ieee: 'K. Chatterjee, A. Elgyütt, P. Novotný, and O. Rouillé, “Expectation optimization
with probabilistic guarantees in POMDPs with discounted-sum objectives,” presented
at the IJCAI: International Joint Conference on Artificial Intelligence, Stockholm,
Sweden, 2018, vol. 2018, pp. 4692–4699.'
ista: 'Chatterjee K, Elgyütt A, Novotný P, Rouillé O. 2018. Expectation optimization
with probabilistic guarantees in POMDPs with discounted-sum objectives. IJCAI:
International Joint Conference on Artificial Intelligence vol. 2018, 4692–4699.'
mla: Chatterjee, Krishnendu, et al. Expectation Optimization with Probabilistic
Guarantees in POMDPs with Discounted-Sum Objectives. Vol. 2018, IJCAI, 2018,
pp. 4692–99, doi:10.24963/ijcai.2018/652.
short: K. Chatterjee, A. Elgyütt, P. Novotný, O. Rouillé, in:, IJCAI, 2018, pp.
4692–4699.
conference:
end_date: 2018-07-19
location: Stockholm, Sweden
name: 'IJCAI: International Joint Conference on Artificial Intelligence'
start_date: 2018-07-13
date_created: 2018-12-11T11:44:13Z
date_published: 2018-07-01T00:00:00Z
date_updated: 2023-09-19T14:45:48Z
day: '01'
department:
- _id: KrCh
- _id: ToHe
doi: 10.24963/ijcai.2018/652
ec_funded: 1
external_id:
arxiv:
- '1804.10601'
isi:
- '000764175404117'
intvolume: ' 2018'
isi: 1
language:
- iso: eng
main_file_link:
- open_access: '1'
url: https://arxiv.org/abs/1804.10601
month: '07'
oa: 1
oa_version: Preprint
page: 4692 - 4699
project:
- _id: 25892FC0-B435-11E9-9278-68D0E5697425
grant_number: ICT15-003
name: Efficient Algorithms for Computer Aided Verification
- _id: 25832EC2-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: S 11407_N23
name: Rigorous Systems Engineering
- _id: 2581B60A-B435-11E9-9278-68D0E5697425
call_identifier: FP7
grant_number: '279307'
name: 'Quantitative Graph Games: Theory and Applications'
publication_status: published
publisher: IJCAI
publist_id: '8031'
quality_controlled: '1'
scopus_import: '1'
status: public
title: Expectation optimization with probabilistic guarantees in POMDPs with discounted-sum
objectives
type: conference
user_id: c635000d-4b10-11ee-a964-aac5a93f6ac1
volume: 2018
year: '2018'
...
---
_id: '6006'
abstract:
- lang: eng
text: 'Network games (NGs) are played on directed graphs and are extensively used
in network design and analysis. Search problems for NGs include finding special
strategy profiles such as a Nash equilibrium and a globally-optimal solution.
The networks modeled by NGs may be huge. In formal verification, abstraction has
proven to be an extremely effective technique for reasoning about systems with
big and even infinite state spaces. We describe an abstraction-refinement methodology
for reasoning about NGs. Our methodology is based on an abstraction function that
maps the state space of an NG to a much smaller state space. We search for a global
optimum and a Nash equilibrium by reasoning on an under- and an over-approximation
defined on top of this smaller state space. When the approximations are too coarse
to find such profiles, we refine the abstraction function. We extend the abstraction-refinement
methodology to labeled networks, where the objectives of the players are regular
languages. Our experimental results demonstrate the effectiveness of the methodology. '
article_number: '39'
author:
- first_name: Guy
full_name: Avni, Guy
id: 463C8BC2-F248-11E8-B48F-1D18A9856A87
last_name: Avni
orcid: 0000-0001-5588-8287
- first_name: Shibashis
full_name: Guha, Shibashis
last_name: Guha
- first_name: Orna
full_name: Kupferman, Orna
last_name: Kupferman
citation:
ama: Avni G, Guha S, Kupferman O. An abstraction-refinement methodology for reasoning
about network games. Games. 2018;9(3). doi:10.3390/g9030039
apa: Avni, G., Guha, S., & Kupferman, O. (2018). An abstraction-refinement methodology
for reasoning about network games. Games. MDPI AG. https://doi.org/10.3390/g9030039
chicago: Avni, Guy, Shibashis Guha, and Orna Kupferman. “An Abstraction-Refinement
Methodology for Reasoning about Network Games.” Games. MDPI AG, 2018. https://doi.org/10.3390/g9030039.
ieee: G. Avni, S. Guha, and O. Kupferman, “An abstraction-refinement methodology
for reasoning about network games,” Games, vol. 9, no. 3. MDPI AG, 2018.
ista: Avni G, Guha S, Kupferman O. 2018. An abstraction-refinement methodology for
reasoning about network games. Games. 9(3), 39.
mla: Avni, Guy, et al. “An Abstraction-Refinement Methodology for Reasoning about
Network Games.” Games, vol. 9, no. 3, 39, MDPI AG, 2018, doi:10.3390/g9030039.
short: G. Avni, S. Guha, O. Kupferman, Games 9 (2018).
date_created: 2019-02-14T14:17:54Z
date_published: 2018-09-01T00:00:00Z
date_updated: 2023-09-22T09:48:59Z
day: '01'
ddc:
- '004'
department:
- _id: ToHe
doi: 10.3390/g9030039
file:
- access_level: open_access
checksum: 749d65ca4ce74256a029d9644a1b1cb0
content_type: application/pdf
creator: kschuh
date_created: 2019-02-14T14:20:31Z
date_updated: 2020-07-14T12:47:16Z
file_id: '6008'
file_name: 2018_MDPI_Avni.pdf
file_size: 505155
relation: main_file
file_date_updated: 2020-07-14T12:47:16Z
has_accepted_license: '1'
intvolume: ' 9'
issue: '3'
language:
- iso: eng
month: '09'
oa: 1
oa_version: Published Version
project:
- _id: 264B3912-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: M02369
name: Formal Methods meets Algorithmic Game Theory
- _id: 25832EC2-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: S 11407_N23
name: Rigorous Systems Engineering
- _id: 25F42A32-B435-11E9-9278-68D0E5697425
call_identifier: FWF
grant_number: Z211
name: The Wittgenstein Prize
publication: Games
publication_identifier:
issn:
- 2073-4336
publication_status: published
publisher: MDPI AG
quality_controlled: '1'
related_material:
record:
- id: '1003'
relation: earlier_version
status: public
scopus_import: 1
status: public
title: An abstraction-refinement methodology for reasoning about network games
tmp:
image: /images/cc_by.png
legal_code_url: https://creativecommons.org/licenses/by/4.0/legalcode
name: Creative Commons Attribution 4.0 International Public License (CC-BY 4.0)
short: CC BY (4.0)
type: journal_article
user_id: 2DF688A6-F248-11E8-B48F-1D18A9856A87
volume: 9
year: '2018'
...