Monitoring temporal logic with clock variables
A. Elgyütt, T. Ferrere, T.A. Henzinger, in:, Springer, 2018, pp. 53–70.
LibreCat: https://research-explorer.ista.ac.at/record/81
DOI: 10.1007/978-3-030-00151-3_4
WoS: 000884993200004

Online timed pattern matching using automata
A. Bakhirkin, T. Ferrere, D. Nickovic, O. Maler, E. Asarin, in:, Springer, 2018, pp. 215–232.
LibreCat: https://research-explorer.ista.ac.at/record/78
DOI: 10.1007/978-3-030-00151-3_13
WoS: 000884993200013

Parameter-independent strategies for pMDPs via POMDPs
S. Arming, E. Bartocci, K. Chatterjee, J.P. Katoen, A. Sokolova, in:, Springer, 2018, pp. 53–70.
LibreCat: https://research-explorer.ista.ac.at/record/79
DOI: 10.1007/978-3-319-99154-2_4
WoS: 000548912200004
arXiv: 1806.05126

Reachable set over-approximation for nonlinear systems using piecewise barrier tubes
H. Kong, E. Bartocci, T.A. Henzinger, in:, Springer, 2018, pp. 449–467.
LibreCat: https://research-explorer.ista.ac.at/record/142
DOI: 10.1007/978-3-319-96145-3_24
WoS: 000491481600024

Safety-assured model-driven design of the multifunction vehicle bus controller
Y. Jiang, H. Liu, H. Song, H. Kong, R. Wang, Y. Guan, L. Sha, IEEE Transactions on Intelligent Transportation Systems 19 (2018) 3320–3333.
LibreCat: https://research-explorer.ista.ac.at/record/434
DOI: 10.1109/TITS.2017.2778077
WoS: 000446651100020

Space-time interpolants
G. Frehse, M. Giacobbe, T.A. Henzinger, in:, Springer, 2018, pp. 468–486.
LibreCat: https://research-explorer.ista.ac.at/record/140
DOI: 10.1007/978-3-319-96145-3_25
WoS: 000491481600025

Strategy representation by decision trees in reactive synthesis
T. Brázdil, K. Chatterjee, J. Kretinsky, V. Toman, in:, Springer, 2018, pp. 385–407.
LibreCat: https://research-explorer.ista.ac.at/record/297
DOI: 10.1007/978-3-319-89960-2_21
WoS: 000546326300021

Synthesis from component libraries with costs
G. Avni, O. Kupferman, Theoretical Computer Science 712 (2018) 50–72.
LibreCat: https://research-explorer.ista.ac.at/record/608
DOI: 10.1016/j.tcs.2017.11.001
WoS: 000424959200003

The compound interest in relaxing punctuality
T. Ferrere, in:, Springer, 2018, pp. 147–164.
LibreCat: https://research-explorer.ista.ac.at/record/156
DOI: 10.1007/978-3-319-95582-7_9
WoS: 000489765800009

Keynote: The first-order logic of signals
A. Bakhirkin, T. Ferrere, T.A. Henzinger, D. Nickovicl, in:, 2018 International Conference on Embedded Software, IEEE, 2018, pp. 1–10.
LibreCat: https://research-explorer.ista.ac.at/record/5959
DOI: 10.1109/emsoft.2018.8537203
WoS: 000492828500005