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LibreCat: https://research-explorer.ista.ac.at/record/7231
DOI: 10.1007/978-3-030-29662-9_8
WoS: 000611677700008
arXiv: 1907.11514

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LibreCat: https://research-explorer.ista.ac.at/record/7340
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WoS: 000512303700001
PMID: 31873072

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LibreCat: https://research-explorer.ista.ac.at/record/7422
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arXiv: 1708.09364

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LibreCat: https://research-explorer.ista.ac.at/record/7230
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arXiv: 1908.08129

Ferrere T, Maler O, Nickovic D. 2019. Mixed-time signal temporal logic. 17th International Conference on Formal Modeling and Analysis of Timed Systems. FORMATS: Formal Modeling and Anaysis of Timed Systems, LNCS, vol. 11750, 59–75.
LibreCat: https://research-explorer.ista.ac.at/record/7232
DOI: 10.1007/978-3-030-29662-9_4
WoS: 000611677700004